UPD75518 NEC, UPD75518 Datasheet - Page 168

• Manufacturer Part Number: UPD75518
• Description: 4 BIT SINGLE-CHIP MICROCOMPUTER
• Manufacturer: NEC

168
SCK cycle time
SCK high/low level
width
SB0/SB1 setup time
(referred to SCK )
SB0/SB1 hold time
(referred to SCK )
SCK
output delay time
SCK
SB0/SB1
SB0/SB1 low level
width
SB0/SB1 high level
width
SCK cycle time
SCK high/low level
width
SB0/SB1 setup time
(referred to SCK )
SB0/SB1 hold time
(referred to SCK )
SCK
output delay time
SCK
SB0/SB1
SB0/SB1 low level
width
SB0/SB1 high level
width
(c) SBI mode (SCK ... Internal clock output (master)):
(d) SBI mode (SCK ... External clock input (slave)):
Parameter
Parameter
Note R
Note R
SB0/SB1
SB0/SB1
SB0/SB1
SB0/SB1
SCK
SCK
L
L
and C
and C
Symbol
Symbol
L
L
t
t
t
t
are the resistance and capacitance of the SO output line load respectively.
t
t
t
are the resistance and capacitance of the SO output line load respectively.
t
t
t
t
t
t
t
t
t
t
t
t
KSO4
t
KSO3
KCY4
KCY3
SIK3
KSI3
KH4
SIK4
KSI4
KSB
SBK
SBH
KH3
KSB
SBK
SBL
SBH
KL4
SBL
KL3
t
KCY
t
KCY
t
Min.
3200
1600
Min.
t
1600
1340
3800
2680
/2 - 150
800
400
100
KCY
t
t
t
t
150
KCY
t
t
t
t
KCY
KCY
KCY
KCY
/2 - 50
0
0
KCY
KCY
KCY
KCY
0
0
/2
/2
Typ.
Typ.
Max.
Max.
1000
1000
300
250
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
V
R
C
V
V
f
f
V
R
C
X
X
DD
DD
L
L
DD
DD
DD
L
L
= 4.19 MHz
= 6.0 MHz
= 100 pF
= 100 pF
= 1 k
= 1 k
= 4.5 to 6.0 V
= 4.5 to 6.0 V
= 4.5 to 6.0 V f
= 4.5 to 6.0 V f
= 4.5 to 6.0 V
,
,
Note
Note
Conditions
Conditions
X
X
V
V
= 6.0 MHz
= 4.19 MHz
DD
DD
= 4.5 to 6.0 V
= 4.5 to 6.0 V
PD75518(A)