UPD77111 NEC, UPD77111 Datasheet - Page 49

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UPD77111

Manufacturer Part Number
UPD77111
Description
16-BIT FIXED-POINT DIGITAL SIGNAL PROCESSORS
Manufacturer
NEC
Datasheet

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Serial Interface
Timing requirements
Switching characteristics
SCK cycle time
SCK high-/low-level width
SCK rise/fall time
SOEN setup time
SOEN hold time
SIEN setup time
SIEN hold time
SI setup time
SI hold time
SORQ output delay time
SORQ hold time
SO output delay time
SO hold time
SIAK output delay time
SIAK hold time
Caution If noise is superimposed on the serial clock, the serial interface may be deadlocked. Bear in
Make sure that the serial clock
rises and falls linearly.
Parameter
Parameter
mind the following points when designing your system:
• Reinforce the wiring for power supply and ground (if noise is superimposed on the power and
• Shorten the wiring between the device’s SCK1 and SCK2 pins, and clock supply source.
• Do not cross the signal lines of the serial clock with any other signal lines. Do not route the
• Supply the clock to the SCK1 and SCK2 pins of the device from the clock source on a one-to-
• Exercise care that the serial clock does not overshoot or undershoot. In particular, make sure
ground lines, it has the same effect as if noise were superimposed on the serial clock).
serial clock line in the vicinity of a line through which a high alternating current flows.
one basis. Do not supply clock to several devices from one clock source.
that the rising and falling of the serial clock waveform are clear.
Symbol
Symbol
t
t
t
t
t
t
suSOE
t
t
t
t
t
t
t
t
hSOE
suSIE
dSOR
hSOR
t
wSC
rtSC
hSIE
suSI
dSO
hSO
dSIA
hSIA
cSC
hSI
The serial clock must not bound. Noise
must not be superimposed on the serial clock.
Data Sheet U12801EJ4V0DS00
Condition
Condition
MIN.
MIN.
60
25
10
10
10
5
5
5
0
0
0
PD77110, 77111, 77112
The serial clock must not rise or
fall step-wise.
TYP.
TYP.
MAX.
MAX.
20
25
25
25
PD77110
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
49

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