AN2320 Freescale Semiconductor / Motorola, AN2320 Datasheet - Page 9

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AN2320

Manufacturer Part Number
AN2320
Description
Interfacing the MCF5272 to a Standalone CAN Controller
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
where CLKIN is the system clock frequency (66 MHz here) and B represents the value in the baud field of
the QMR register and lies between 1 and 255. As a baud rate of 6MBps would require B = 5.5 the maximum
achievable baud rate will be 5.5 MBps, with B = 6.
2.3
The reset output signal from the MCF5272 processor (-RSTO) is used to drive the reset of the 82C900 CAN
controller. As the reset signal to the CAN controller need only be asserted for 5 CAN clock cycles which at
24 MHz equates to 14 MCF5272 CPU clocks when running at 66 MHz, any MCF5272 reset will reset the
CAN controller.
The four MCF5272 resets are master reset, normal reset, soft reset, and software watchdog timer reset.
Master reset will reset the entire processor including SDRAM, normal reset will terminate all bus activity
except SDRAM refresh cycles ensuring data stored in SDRAM is not lost during a reset, soft reset will reset
all external devices and all internal peripherals excluding the SIM, the chip-select controller, the interrupt
controller, the GPIO module and the SDRAM controller, and the software watchdog timer will generate a
reset if it is not periodically accessed by software as programmed. -RSTO is driven low for 128 CPU clocks
during soft reset and for 32K CPU clocks when a low input level is applied to -RSTI during a master and
normal reset or when the software watchdog timer times out.
It should be noted that there must be a delay of 1100 CAN clock cycles following the negation of -RSTO
and before accessing the CAN controller. Reset exception processing which follows the negation of -RSTO
will not provide the required delay but the system initialisation process should.
2.4
The M5272C3 board which the CAN daughter card is connected to supplies 3.3V power only. The 5V input
required by the CAN controller, the CAN transceivers, and the 24 MHz oscillator chip is provided by a
Maxim charge pump on the daughter card itself. The MAX682 was chosen because it is capable of
delivering the 250mA required to meet the maximum possible combined load from the 82C900, the
PCA82C250, and the ACT1100 oscillator chips.
2.5
The 82C900 has 72 interrupt request sources in total. These 72 sources are assigned to 1 of 8 CAN interrupt
nodes which can then be driven on the output pins OUT0 and OUT1.
The 72 interrupt sources are divided up as follows. Each of the 32 message objects have 2 interrupt request
sources indicating when a message has been received or when a message has been transmitted. Each CAN
node also has four global interrupt requests which include
Each message object assigned to the CAN node can be a source for these errors. Mask registers are used to
determine which interrupts within each message should be recognised or ignored for the generation of the
CAN node global interrupt request.
MOTOROLA
TxRx OK—Indicates when a message, assigned to that node, has been transmitted or received
okay
Last Error Code—Indicates the last error to occur (stuff/format/CRC/bus arbitration)
Error—Indicates when the number of CAN bus errors exceeds a predefined limit
Frame Counter—Indicates transfer sequence of message objects and the time instant a frame was
last transmitted or received.
Reset
Power
Interrupts
Interfacing the MCF5272 to a Standalone CAN Controller
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Reset
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