MCP6272 Microchip Technology Inc., MCP6272 Datasheet - Page 13

• Manufacturer Part Number: MCP6272
• Description: 170 ?a, 2 Mhz Rail-to-rail Op Am
• Manufacturer: Microchip Technology Inc.

4.3
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. A unity gain buffer (G = +1) is the most
sensitive to capacitive loads, though all gains show the
same general behavior.
When driving large capacitive loads with these op
amps (e.g., > 100 pF when G = +1), a small series
resistor at the output (R
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitive load.
FIGURE 4-3:
stabilizes large capacitive loads.
Figure 4-4
different capacitive loads and gains. The x-axis is the
normalized load capacitance (C
circuit's noise gain. For non-inverting gains, G
Signal Gain are equal. For inverting gains, G
1+|Signal Gain| (e.g., –1 V/V gives G
FIGURE 4-4:
for Capacitive Loads.
After selecting R
resulting frequency response peaking and step
response overshoot. Modify R
response is reasonable. Bench evaluation and
simulations with the MCP6271/1R/2/3/4/5 SPICE
macro model are helpful.
© 2006 Microchip Technology Inc.
V
IN
1,000
100
10
Capacitive Loads
10
gives recommended R
Normalized Load Capacitance; C
–
+
MCP627X
ISO
for your circuit, double check the
Output Resistor, R
100
Recommended R
ISO
in
Figure
G
G
G
R
N
N
N
L
ISO
= 1 V/V
= 2 V/V
/G
ISO
4 V/V
1,000
C
N
's value until the
), where G
L
4-3) improves the
N
ISO
= +2 V/V).
L
/ G
ISO
ISO
values for
N
(pF)
N
10,000
Values
V
N
and the
OUT
is the
N
is
4.4
The MCP6273 and MCP6275 are single and dual op
amps with Chip Select (CS), respectively. When CS is
pulled high, the supply current drops to 0.7 µA (typ.)
and flows through the CS pin to V
happens, the amplifier output is put into a high
impedance state. By pulling CS low, the amplifier is
enabled. The CS pin has a 5 MΩ (typ.) pull-down
resistor connected to V
is left floating.
supply current response to a CS pulse.
4.5
The MCP6275 is a dual op amp with Chip Select (CS).
The Chip Select input is available on what would be the
non-inverting input of a standard dual op amp (pin 5).
This pin is available because the output of op amp A
connects to the non-inverting input of op amp B, as
shown in
be connected to a microcontroller I/O line, puts the
device in low power mode. Refer to Section 4.4
“MCP6273/5 Chip Select (CS)”.
FIGURE 4-5:
The output of op amp A is loaded by the input
impedance of op amp B, which is typically
10
(Refer to Section 4.3 “Capacitive Loads” for further
details regarding capacitive loads).
The common mode input range of these op amps is
specified in the data sheet as V
V
is limited to V
10 kΩ load), the non-inverting input range of op amp B
is limited to the common mode input range of
V
V
V
DD
SS
13
MCP6271/1R/2/3/4/5
INA
INA
Ω⎟⎟6 pF, as specified in the DC specification table
+ 20 mV and V
+ 300 mV. However, since the output of op amp A
+
–
MCP6273/5 Chip Select (CS)
Cascaded Dual Op Amps
(MCP6275)
2
3
Figure
OL
Figure 1-1
A
V
4-5. The Chip Select input, which can
and V
OUTA
DD
1
MCP6275
/V
Cascaded Gain Amplifier.
– 20 mV.
OH
SS
INB
shows the output voltage and
, so it will go low if the CS pin
CS
(20 mV from the rails with a
+
5
V
INB
6
–
SS
DS21810E-page 13
SS
B
– 300 mV and
. When this
7
V
OUTB