LM3S6633 Luminary Micro, Inc, LM3S6633 Datasheet - Page 10

• Manufacturer Part Number: LM3S6633
• Description: Lm3s6633 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Table of Contents
List of Tables
Table 1.
Table 2.
Table 3-1.
Table 4-1.
Table 4-2.
Table 5-1.
Table 5-2.
Table 6-1.
Table 7-1.
Table 8-1.
Table 8-2.
Table 8-3.
Table 9-1.
Table 9-2.
Table 9-3.
Table 10-1.
Table 10-2.
Table 10-3.
Table 11-1.
Table 12-1.
Table 12-2.
Table 12-3.
Table 13-1.
Table 14-1.
Table 15-1.
Table 15-2.
Table 15-3.
Table 16-1.
Table 16-2.
Table 17-1.
Table 17-2.
Table 17-3.
Table 19-1.
Table 19-2.
Table 19-3.
Table 19-4.
Table 19-5.
Table 19-6.
Table 19-7.
Table 19-8.
Table 20-1.
Table 20-2.
Table 21-1.
Table 21-2.
Table 21-3.
Table 21-4.
10
Revision History .............................................................................................................. 18
Documentation Conventions ............................................................................................ 20
Memory Map ................................................................................................................... 42
Exception Types .............................................................................................................. 44
Interrupts ........................................................................................................................ 45
JTAG Port Pins Reset State ............................................................................................. 49
JTAG Instruction Register Commands ............................................................................... 54
System Control Register Map ........................................................................................... 67
Hibernation Module Register Map ................................................................................... 126
Flash Protection Policy Combinations ............................................................................. 140
Flash Resident Registers ............................................................................................... 142
Flash Register Map ........................................................................................................ 143
GPIO Pad Configuration Examples ................................................................................. 167
GPIO Interrupt Configuration Example ............................................................................ 167
GPIO Register Map ....................................................................................................... 169
Available CCP Pins ........................................................................................................ 206
16-Bit Timer With Prescaler Configurations ..................................................................... 209
Timers Register Map ...................................................................................................... 215
Watchdog Timer Register Map ........................................................................................ 242
Samples and FIFO Depth of Sequencers ........................................................................ 265
Differential Sampling Pairs ............................................................................................. 267
ADC Register Map ......................................................................................................... 270
UART Register Map ....................................................................................................... 303
SSI Register Map .......................................................................................................... 348
Examples of I
Inter-Integrated Circuit (I
Write Field Decoding for I2CMCS[3:0] Field (Sheet 1 of 3) ................................................ 392
TX & RX FIFO Organization ........................................................................................... 414
Ethernet Register Map ................................................................................................... 417
Comparator 0 Operating Modes ...................................................................................... 455
Internal Reference Voltage and ACREFCTL Field Values ................................................. 456
Analog Comparators Register Map ................................................................................. 457
Signals by Pin Number ................................................................................................... 467
Signals by Signal Name ................................................................................................. 471
Signals by Function, Except for GPIO ............................................................................. 475
GPIO Pins and Alternate Functions ................................................................................. 478
Signals by Pin Number ................................................................................................... 479
Signals by Signal Name ................................................................................................. 483
Signals by Function, Except for GPIO ............................................................................. 487
GPIO Pins and Alternate Functions ................................................................................. 490
Temperature Characteristics ........................................................................................... 492
Thermal Characteristics ................................................................................................. 492
Maximum Ratings .......................................................................................................... 493
Recommended DC Operating Conditions ........................................................................ 493
LDO Regulator Characteristics ....................................................................................... 494
Detailed Power Specifications ........................................................................................ 495
2
C Master Timer Period versus Speed Mode ............................................... 378
2
C) Interface Register Map ......................................................... 387
Preliminary
July 25, 2008