LM3S6633 Luminary Micro, Inc, LM3S6633 Datasheet - Page 476

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LM3S6633

Manufacturer Part Number
LM3S6633
Description
Lm3s6633 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Signal Tables
476
JTAG/SWD/SWO
Power
Function
I2C0SDA
SWCLK
SWDIO
SWO
TCK
TDI
TDO
TMS
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDA
GNDA
HIB
LDO
VBAT
VDD
VDD
VDD
VDD
VDD
VDD
Pin Name
Number
Pin
71
80
79
77
80
78
77
79
15
21
33
39
45
54
57
63
69
82
87
94
97
51
55
20
32
44
56
68
9
4
7
8
Preliminary
Pin Type
I/O
I/O
I/O
O
O
O
I
I
I
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Buffer
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Type
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
OD
I2C module 0 data
JTAG/SWD CLK
JTAG TMS and SWDIO
JTAG TDO and SWO
JTAG/SWD CLK
JTAG TDI
JTAG TDO and SWO
JTAG TMS and SWDIO
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
The ground reference for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from GND to minimize the electrical noise contained
on VDD from affecting the analog functions.
The ground reference for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from GND to minimize the electrical noise contained
on VDD from affecting the analog functions.
An output that indicates the processor is in
hibernate mode.
Low drop-out regulator output voltage. This pin
requires an external capacitor between the pin and
GND of 1 µF or greater. The LDO pin must also be
connected to the VDD25 pins at the board level in
addition to the decoupling capacitor(s).
Power source for the Hibernation Module. It is
normally connected to the positive terminal of a
battery and serves as the battery
backup/Hibernation Module power-source supply.
Positive supply for I/O and some logic.
Positive supply for I/O and some logic.
Positive supply for I/O and some logic.
Positive supply for I/O and some logic.
Positive supply for I/O and some logic.
Positive supply for I/O and some logic.
Description
July 25, 2008

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