LM3S6633 Luminary Micro, Inc, LM3S6633 Datasheet - Page 428

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LM3S6633

Manufacturer Part Number
LM3S6633
Description
Lm3s6633 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Reset
Reset
Type
Type
Ethernet Controller
Ethernet MAC Individual Address 1 (MACIA1)
Base 0x4004.8000
Offset 0x018
Type R/W, reset 0x0000.0000
428
Bit/Field
31:16
15:8
7:0
R/W
RO
31
15
0
0
R/W
Register 8: Ethernet MAC Individual Address 1 (MACIA1), offset 0x018
This register enables software to program the last two bytes of the hardware MAC address of the
Network Interface Card (NIC). (The first four bytes are in MACIA0). The 6-byte IAR is compared
against the incoming Destination Address fields to determine whether the frame should be received.
RO
30
14
0
0
MACOCT6
MACOCT5
R/W
reserved
RO
29
13
0
0
Name
R/W
RO
28
12
0
0
MACOCT6
R/W
RO
27
11
0
0
Type
R/W
R/W
RO
R/W
RO
26
10
0
0
Reset
R/W
0x0
0x0
0x0
RO
25
0
9
0
Preliminary
R/W
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
MAC Address Octet 6
The MACOCT6 bits represent the sixth octet of the MAC address used
to uniquely identify each Ethernet Controller.
MAC Address Octet 5
The MACOCT5 bits represent the fifth octet of the MAC address used to
uniquely identify each Ethernet Controller.
reserved
R/W
RO
23
0
7
0
R/W
RO
22
0
6
0
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
MACOCT5
R/W
RO
19
0
3
0
R/W
RO
18
0
2
0
July 25, 2008
R/W
RO
17
0
1
0
R/W
RO
16
0
0
0

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