LM3S6633 Luminary Micro, Inc, LM3S6633 Datasheet - Page 6

• Manufacturer Part Number: LM3S6633
• Description: Lm3s6633 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Table of Contents
13.4
13.5
14
14.1
14.2
14.2.1 Bit Rate Generation ................................................................................................................. 339
14.2.2 FIFO Operation ....................................................................................................................... 339
14.2.3 Interrupts ................................................................................................................................ 339
14.2.4 Frame Formats ....................................................................................................................... 340
14.3
14.4
14.5
15
15.1
15.2
15.2.1 I
15.2.2 Available Speed Modes ........................................................................................................... 378
15.2.3 Interrupts ................................................................................................................................ 379
15.2.4 Loopback Operation ................................................................................................................ 379
15.2.5 Command Sequence Flow Charts ............................................................................................ 380
15.3
15.4
15.5
15.6
16
16.1
16.2
16.2.1 Internal MII Operation .............................................................................................................. 412
16.2.2 PHY Configuration/Operation ................................................................................................... 412
16.2.3 MAC Configuration/Operation .................................................................................................. 413
16.2.4 Interrupts ................................................................................................................................ 415
16.3
16.4
16.5
16.6
17
17.1
17.2
17.2.1 Internal Reference Programming .............................................................................................. 455
17.3
17.4
17.5
18
19
19.1
19.2
6
Register Map .......................................................................................................................... 303
Register Descriptions .............................................................................................................. 304
Synchronous Serial Interface (SSI) ................................................................................ 338
Block Diagram ........................................................................................................................ 338
Functional Description ............................................................................................................. 338
Initialization and Configuration ................................................................................................. 347
Register Map .......................................................................................................................... 348
Register Descriptions .............................................................................................................. 349
Inter-Integrated Circuit (I
Block Diagram ........................................................................................................................ 375
Functional Description ............................................................................................................. 375
Initialization and Configuration ................................................................................................. 386
Register Map .......................................................................................................................... 387
Register Descriptions (I
Register Descriptions (I2C Slave) ............................................................................................. 401
Ethernet Controller .......................................................................................................... 410
Block Diagram ........................................................................................................................ 411
Functional Description ............................................................................................................. 411
Initialization and Configuration ................................................................................................. 416
Ethernet Register Map ............................................................................................................. 417
Ethernet MAC Register Descriptions ......................................................................................... 418
MII Management Register Descriptions ..................................................................................... 435
Analog Comparator ......................................................................................................... 454
Block Diagram ........................................................................................................................ 454
Functional Description ............................................................................................................. 454
Initialization and Configuration ................................................................................................. 456
Register Map .......................................................................................................................... 457
Register Descriptions .............................................................................................................. 457
Pin Diagram ...................................................................................................................... 465
Signal Tables .................................................................................................................... 467
100-Pin LQFP Package Pin Tables ........................................................................................... 467
108-Pin BGA Package Pin Tables ............................................................................................ 479
2
C Bus Functional Overview .................................................................................................... 376
2
C Master) ........................................................................................... 388
2
C) Interface ............................................................................ 375
Preliminary
July 25, 2008