LM3S8930 Luminary Micro, Inc, LM3S8930 Datasheet - Page 383
LM3S8930
Manufacturer Part Number
LM3S8930
Description
Lm3s8930 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S8930.pdf
(526 pages)
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15.4.15
July 25, 2008
The CAN controller translates messages to and from frames. It generates and discards the enclosing
fixed format bits, inserts and extracts stuff bits, calculates and checks the CRC code, performs the
error management, and decides which type of synchronization is to be used. It is evaluated at the
Sample Point and processes the sampled bus input bit. The time after the Sample Point that is
needed to calculate the next bit to be sent (that is, the data bit, CRC bit, stuff bit, error flag, or idle)
is called the Information Processing Time (IPT).
The IPT is application-specific but may not be longer than 2 t
the lower limit of the programmed length of Phase_Seg2. In case of synchronization, Phase_Seg2
may be shortened to a value less than IPT, which does not affect bus timing.
Calculating the Bit Timing Parameters
Usually, the calculation of the bit timing configuration starts with a desired bit rate or bit time. The
resulting bit time (1/bit rate) must be an integer multiple of the system clock period.
The bit time may consist of 4 to 25 time quanta. Several combinations may lead to the desired bit
time, allowing iterations of the following steps.
The first part of the bit time to be defined is the Prop_Seg. Its length depends on the delay times
measured in the system. A maximum bus length as well as a maximum node delay has to be defined
for expandable CAN bus systems. The resulting time for Prop_Seg is converted into time quanta
(rounded up to the nearest integer multiple of t
The Sync_Seg is 1 t
Segments. If the number of remaining t
that is, Phase_Seg2 = Phase_Seg1, else Phase_Seg2 = Phase_Seg1 + 1.
The minimum nominal length of Phase_Seg2 has to be regarded as well. Phase_Seg2 may not
be shorter than the CAN controller's Information Processing Time, which is, depending on the actual
implementation, in the range of [0..2] t
The length of the Synchronization Jump Width is set to its maximum value, which is the minimum
of 4 and Phase_Seg1.
The oscillator tolerance range necessary for the resulting configuration is calculated by the formula
given below:
(1 -df) x fnom <= fosc <= (1+ df) × fnom
where:
■
■
■
Maximum frequency tolerance must take into account the following formulas:
df <= (Phase_Seg1,Phase_Seg2)min/ 2 × (13 × tbit - Phase_Seg2)
dfmax = 2 × df × fnom
where:
■
df = Maximum tolerance of oscillator frequency
fosc = Actual oscillator frequency
fnom = Nominal oscillator frequency
Phase_Seg1 and Phase_Seg2 are from Table 15-3 on page 382
q
long (fixed), which leaves (bit time - Prop_Seg - 1) t
Preliminary
q
q
.
is even, the Phase Buffer Segments have the same length,
q
).
q
; the CAN's IPT is 0 t
LM3S8930 Microcontroller
q
for the two Phase Buffer
q
. Its length is
383
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