LM3S8930 Luminary Micro, Inc, LM3S8930 Datasheet - Page 4

• Manufacturer Part Number: LM3S8930
• Description: Lm3s8930 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Table of Contents
6.1.3
6.1.4
6.1.5
6.2
6.3
6.4
7
7.1
7.2
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.2.6
7.2.7
7.3
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.4
7.5
8
8.1
8.2
8.2.1
8.2.2
8.3
8.3.1
8.3.2
8.4
8.5
8.6
9
9.1
9.1.1
9.1.2
9.1.3
9.1.4
9.1.5
9.1.6
9.2
9.3
9.4
4
Power Control ........................................................................................................................... 61
Clock Control ............................................................................................................................ 62
System Control ......................................................................................................................... 65
Initialization and Configuration ................................................................................................... 66
Register Map ............................................................................................................................ 67
Register Descriptions ................................................................................................................ 68
Hibernation Module .......................................................................................................... 117
Block Diagram ........................................................................................................................ 118
Functional Description ............................................................................................................. 118
Register Access Timing ........................................................................................................... 118
Clock Source .......................................................................................................................... 119
Battery Management ............................................................................................................... 120
Real-Time Clock ...................................................................................................................... 121
Non-Volatile Memory ............................................................................................................... 121
Power Control ......................................................................................................................... 121
Interrupts and Status ............................................................................................................... 122
Initialization and Configuration ................................................................................................. 122
Initialization ............................................................................................................................. 122
RTC Match Functionality (No Hibernation) ................................................................................ 123
RTC Match/Wake-Up from Hibernation ..................................................................................... 123
External Wake-Up from Hibernation .......................................................................................... 123
RTC/External Wake-Up from Hibernation .................................................................................. 123
Register Map .......................................................................................................................... 123
Register Descriptions .............................................................................................................. 124
Internal Memory ............................................................................................................... 137
Block Diagram ........................................................................................................................ 137
Functional Description ............................................................................................................. 137
SRAM Memory ........................................................................................................................ 137
Flash Memory ......................................................................................................................... 138
Flash Memory Initialization and Configuration ........................................................................... 139
Flash Programming ................................................................................................................. 139
Nonvolatile Register Programming ........................................................................................... 140
Register Map .......................................................................................................................... 140
Flash Register Descriptions (Flash Control Offset) ..................................................................... 141
Flash Register Descriptions (System Control Offset) .................................................................. 148
General-Purpose Input/Outputs (GPIOs) ....................................................................... 161
Functional Description ............................................................................................................. 161
Data Control ........................................................................................................................... 162
Interrupt Control ...................................................................................................................... 163
Mode Control .......................................................................................................................... 164
Commit Control ....................................................................................................................... 164
Pad Control ............................................................................................................................. 164
Identification ........................................................................................................................... 164
Initialization and Configuration ................................................................................................. 164
Register Map .......................................................................................................................... 165
Register Descriptions .............................................................................................................. 167
Preliminary
July 25, 2008