LM3S8930 Luminary Micro, Inc, LM3S8930 Datasheet - Page 92
![no-image](/images/no-image-200.jpg)
LM3S8930
Manufacturer Part Number
LM3S8930
Description
Lm3s8930 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S8930.pdf
(526 pages)
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Reset
Reset
Type
Type
System Control
Device Capabilities 3 (DC3)
Base 0x400F.E000
Offset 0x018
Type RO, reset 0x8300.0000
92
Bit/Field
30:26
23:0
32KHZ
31
25
24
RO
RO
31
15
1
0
Register 16: Device Capabilities 3 (DC3), offset 0x018
This register provides a list of features available in the system. The Stellaris family uses this register
format to indicate the availability of the following family features in the specific device: Analog
Comparator I/Os, CCP I/Os, ADC I/Os, and PWM I/Os.
RO
RO
30
14
0
0
reserved
reserved
RO
RO
29
13
32KHZ
0
0
Name
CCP1
CCP0
reserved
RO
RO
28
12
0
0
RO
RO
27
11
0
0
Type
RO
RO
RO
RO
RO
RO
RO
26
10
0
0
Reset
CCP1
RO
RO
25
1
9
0
1
0
1
1
0
Preliminary
CCP0
RO
RO
24
1
8
0
Description
32KHz Input Clock Available
When set, indicates an even CCP pin is present and can be used as a
32-KHz input clock.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
CCP1 Pin Present
When set, indicates that Capture/Compare/PWM pin 1 is present.
CCP0 Pin Present
When set, indicates that Capture/Compare/PWM pin 0 is present.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
reserved
RO
RO
19
0
3
0
RO
RO
18
0
2
0
July 25, 2008
RO
RO
17
0
1
0
RO
RO
16
0
0
0
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