LM3S2730 Luminary Micro, Inc, LM3S2730 Datasheet - Page 370

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LM3S2730

Manufacturer Part Number
LM3S2730
Description
Lm3s2730 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Signal Tables
370
Table 16-2. Signals by Signal Name
Pin Name
CAN0Rx
CAN0Tx
CMOD0
CMOD1
CCP0
CCP1
CCP2
CCP3
GNDA
GNDA
C0+
C0-
C0o
C1+
C1-
C1o
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
LDO
Pin Number
100
90
92
24
91
10
66
34
67
23
65
76
15
21
33
39
45
54
57
63
69
82
87
94
97
11
2
9
4
7
Preliminary
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
I
I
I
I
I
Buffer Type
Analog
Analog
Analog
Analog
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
Description
Analog comparator 0 positive input
Analog comparator 0 negative input
Analog comparator 0 output
Analog comparator positive input
Analog comparator 1 negative input
Analog comparator 1 output
CAN module 0 receive
CAN module 0 transmit
Capture/Compare/PWM 0
Capture/Compare/PWM 1
Capture/Compare/PWM 2
Capture/Compare/PWM 3
CPU Mode bit 0. Input must be set to logic 0
(grounded); other encodings reserved.
CPU Mode bit 1. Input must be set to logic 0
(grounded); other encodings reserved.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
Low drop-out regulator output voltage. This
pin requires an external capacitor between
the pin and GND of 1 µF or greater. The LDO
pin must also be connected to the VDD25 pins
at the board level in addition to the decoupling
capacitor(s).
July 25, 2008

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