MT9045AN Zarlink Semiconductor, Inc., MT9045AN Datasheet - Page 10

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MT9045AN

Manufacturer Part Number
MT9045AN
Description
Framer, Framer Circuit, T1/E1/OC3 System Synchronizer
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet

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From a reset condition, the MT9045 will take up to 30 seconds (see AC Electrical Characteristics) of input
reference signal to output signals which are synchronized (phase locked) to the reference input.
The selection of input references is control dependent as shown in state Table 4. The reference frequencies are
selected by the frequency control pins FS2 and FS1 as shown in Table 1.
Fast Lock Mode
Fast Lock Mode is a submode of Normal Mode, it is used to allow the MT9045 to lock to a reference more
quickly than Normal Mode will allow. Typically, the PLL will lock to the incoming reference within 500ms if the
FLOCK pin is set high.
Holdover Mode
Holdover Mode is typically used for short durations (e.g., 2 seconds) while network synchronization is
temporarily disrupted.
In Holdover Mode, the MT9045 provides timing and synchronization signals, which are not locked to an external
reference signal, but are based on storage techniques. The storage value is determined while the device is in
Normal Mode and locked to an external reference signal.
When in Normal Mode, and locked to the input reference signal, a numerical value corresponding to the
MT9045 output reference frequency is stored alternately in two memory locations every 30ms. When the device
is switched into Holdover Mode, the value in memory from between 30ms and 60ms is used to set the output
frequency of the device.
The frequency accuracy of Holdover Mode is
slips in 24 hours. This satisfies the AT&T TR62411 and Bellcore GR-1244-CORE Stratum 3 requirement of
±
Two factors affect the accuracy of Holdover Mode. One is drift on the Master Clock while in Holdover Mode, drift
on the Master Clock directly affects the Holdover Mode accuracy. Note that the absolute Master Clock (OSCi)
accuracy does not affect Holdover accuracy, only the change in OSCi accuracy while in Holdover.
example, a
degree change in temperature, while the MT9045 is in Holdover Mode may result in an additional offset (over
the
The other factor affecting accuracy is large jitter on the reference input prior (30ms to 60ms) to the mode switch.
For instance, jitter of 7.5UI at 700Hz may reduce the Holdover Mode accuracy from
Freerun Mode
Freerun Mode is typically used when a master clock source is required, or immediately following system power-
up before network synchronization is achieved.
In Freerun Mode, the MT9045 provides timing and synchronization signals which are based on the master clock
frequency (OSCi) only, and are not synchronized to the reference signals (PRI and SEC).
The accuracy of the output clock is equal to the accuracy of the master clock (OSCi). So if a
clock is required, the master clock must also be
sections.
MT9045
0.37ppm (255 frame slips per 24 hours).
±
0.05ppm) in frequency accuracy of
±
32ppm master clock may have a temperature coefficient of
±
1ppm. Which is much greater than the
Zarlink Semiconductor Inc.
±
0.05ppm, which translates to a worst case 35
±
32ppm. See Applications - Crystal and Clock Oscillator
±
0.1ppm per degree C. So a
±
0.05ppm of the MT9045.
±
0.05ppm to
±
frame (125us)
Data Sheet
32ppm output
±
0.10ppm.
±
For
10

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