MT9045AN Zarlink Semiconductor, Inc., MT9045AN Datasheet - Page 3

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MT9045AN

Manufacturer Part Number
MT9045AN
Description
Framer, Framer Circuit, T1/E1/OC3 System Synchronizer
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet

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Data Sheet
Pin Description (continued)
28,35
Pin #
7,17
12
13
14
15
16
18
19
20
21
22
24
25
26
27
29
11
8
9
FLOCK
OVER
Name
OSCo
LOCK
HOLD
C1.5o
OSCi
C19o
C16o
F16o
RSP
TSP
C2o
C4o
C8o
C6o
V
F0o
F8o
IC
DD
Positive Supply Voltage. +3.3V
Oscillator Master Clock (CMOS Output).
connected from this pin to OSCi, see Figure 9. Not suitable for driving other devices. For clock
oscillator operation, this pin is left unconnected, see Figure 8.
Oscillator Master Clock (CMOS Input). For crystal operation, a 20MHz crystal is
connected from this pin to OSCo, see Figure 9. For clock oscillator operation, this pin is
connected to a clock source, see Figure 8.
Frame Pulse ST-BUS 8.192 Mb/s (CMOS Output). This is an 8kHz 61ns active low framing
pulse, which marks the beginning of an ST-BUS frame. This is typically used for ST-BUS
operation at 8.192 Mb/s. See Figure 14.
Frame Pulse ST-BUS 2.048Mb/s (CMOS Output). This is an 8kHz 244ns active low framing
pulse, which marks the beginning of an ST-BUS frame. This is typically used for ST-BUS
operation at 2.048Mb/s and 4.096Mb/s. See Figure 14.
Receive Sync Pulse (CMOS Output). This is an 8kHz 488ns active high framing pulse,
which marks the beginning of an ST-BUS frame. This is typically used for connection to the
Siemens MUNICH-32 device. See Figure 15.
Transmit Sync Pulse (CMOS Output). This is an 8kHz 488ns active high framing pulse,
which marks the beginning of an ST-BUS frame. This is typically used for connection to the
Siemens MUNICH-32 device. See Figure 15.
Frame Pulse (CMOS Output). This is an 8kHz 122ns active high framing pulse, which marks
the beginning of a frame. See Figure 14.
Clock 1.544MHz (CMOS Output). This output is used in T1 applications.
Lock Indicator (CMOS Output). This output goes high when the PLL is frequency locked to
the input reference.
Clock 2.048MHz (CMOS Output). This output is used for ST-BUS operation at 2.048Mb/s.
Clock 4.096MHz (CMOS Output). This output is used for ST-BUS operation at 2.048Mb/s
and 4.096Mb/s.
Clock 19.44MHz (CMOS Output). This output is used in OC3/STS3 applications.
Fast Lock Mode (Input). Set high to allow the PLL to quickly lock to the input reference
(less than 500 ms locking time).
Internal Connection. Tie low for normal operation.
Clock 8.192MHz (CMOS Output). This output is used for ST-BUS operation at 8.192Mb/s.
Clock 16.384MHz (CMOS Output). This output is used for ST-BUS operation with a
16.384MHz clock.
Clock 6.312 Mhz (CMOS Output). This output is used for DS2 applications.
Holdover (CMOS Output). This output goes to a logic high whenever the PLL goes into
holdover mode.
Zarlink Semiconductor Inc.
DC
nominal.
Description
For crystal operation, a 20MHz crystal is
MT9045
3

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