MCS9845 MosChip Semiconductor, MCS9845 Datasheet - Page 16

• Manufacturer Part Number: MCS9845
• Description: PCI Dual UART
• Manufacturer: MosChip Semiconductor

Page 16
MCS9845
PCI Dual UART with ISA Bridge
FIFO Control Register (FCR)
The FIFO Control Register (FCR) is a write only
register. The FCR enables and clears the FIFOs, as
well as setting the receive FIFO trigger level.
FCR Bit-0:
0 = 16C450 mode, disables the transmitter and
1 = Enables the transmitter and receiver FIFOs. This
FCR Bit-1:
0 = Normal operation
1 = Clears all Bytes in the receiver FIFO and resets
FCR Bit-2:
0 = Normal operation
1 = Clears all Bytes in the transmitter FIFO and
FCR Bit 5-3:
Not used (Always 0).
FCR Bits 7-6:
These bits are used to set the trigger level for receive
FIFO interrupts.
Bit-7
0
0
1
1
receiver FIFO.
bit must be set to 1 when other FCR bits are
written to or they are not programmed. Changing
this bit clears the FIFOs.
its counter logic to 0. The shift register is not
cleared. The one that is written to this bit position
is self-clearing.
resets its counter logic to 0. The shift register
is not cleared. The one that is written to this bit
position is self-clearing.
Receive Trigger Level (Bytes)
Bit-6
0
1
0
1
RX FIFO Trigger Level
14
1
4
8
w w w . D a t a S h e e t 4 U . c o m
Rev.
2.5