MCS9845 MosChip Semiconductor, MCS9845 Datasheet - Page 5

• Manufacturer Part Number: MCS9845
• Description: PCI Dual UART
• Manufacturer: MosChip Semiconductor

Rev. 2.5
12XCLK
EE-CLK
nC/BE3
nC/BE2
nC/BE1
nC/BE0
EE-DO
6XCLK
3XCLK
EE-CS
EE-EN
XTAL1
XTAL2
Name
nINTA
EE-DI
ACLK
120
123
Pin
115
116
118
117
22
32
43
62
61
58
56
55
59
8
Type
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
Bus Command and Byte Enable.
During the address phase of a transaction, nC/BE3-0 defi nes the bus command.
During the data phase, nC/BE3-0 are used as Byte Enables. nC/BE3 applies to
Byte “3”.
Bus Command and Byte Enable.
During the address phase of a transaction, nC/BE3-0 defi nes the bus command.
During the data phase, nC/BE3-0 are used as Byte Enables. nC/BE3 applies to
Byte “2”.
Bus Command and Byte Enable.
During the address phase of a transaction, nC/BE3-0 defi nes the bus command.
During the data phase, nC/BE3-0 are used as Byte Enables. nC/BE3 applies to
Byte “1”.
Bus Command and Byte Enable.
During the address phase of a transaction, nC/BE3-0 defi nes the bus command.
During the data phase, nC/BE3-0 are used as Byte Enables. nC/BE3 applies to
Byte “0”.
PCI active low interrupt output (open-drain).
This signal goes low (active) when an interrupt condition occurs.
External EEPROM chip select (active high).
After Power-On Reset, the EEPROM is read, and the read-only confi guration
registers are fi lled sequentially from the fi rst 64 Bytes in the EEPROM.
External EEPROM clock.
External EEPROM data input.
External EEPROM data output.
Enable EEPROM (active high, internal pull-up).
The external EEPROM can be disabled when this pin is tied to GND or pulled low.
When the EEPROM is disabled, default values for PCI confi guration registers will
be used.
Crystal oscillator input or external clock input pin (22.1184 MHz).
This signal input is used in conjunction with XTAL2 to form a feedback circuit for
the internal timing. Two external capacitors (10pF) connected from each side of the
XTAL1 and XTAL2 to GND are required to form a crystal oscillator circuit.
Crystal oscillator output. See XTAL1 description.
Master clock divided by 12 (1.8432 MHz)
Standard UART clock for 115.2K data rate.
Master clock divided by 6 (3.6864 MHz)
Reserved pin. No connection.
Master clock divided by 3 (7.3728 MHz)
Reserved pin. No connection.
UART-A clock input.
ACLK should be connected to the 12XCLK output pin.
PCI Dual UART with ISA Bridge
Description
MCS9845
www.DataSheet4U.com
Page 5