LTC1871 Linear Technology, LTC1871 Datasheet - Page 19

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LTC1871

Manufacturer Part Number
LTC1871
Description
Wide Input Range/ No RSENSE Current Mode Boost/ Flyback and SEPIC Controller
Manufacturer
Linear Technology
Datasheet

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APPLICATIO S I FOR ATIO
The output voltage ripple can increase during Burst Mode
operation if I
occur if the input voltage is very low or if a very large
inductor is chosen. At high duty cycles, a skipped cycle
causes the inductor current to quickly decay to zero.
However, because I
the current to ramp back up to I
inductor charging interval, the output capacitor must
supply the load current and a significant droop in the
output voltage can occur. Generally, it is a good idea to
choose a value of inductor I
I
the output capacitor or disable Burst Mode operation
using the MODE/SYNC pin.
Burst Mode operation can be defeated by connecting the
MODE/SYNC pin to a high logic-level voltage (either with
a control input or by connecting this pin to INTV
mode, the burst clamp is removed, and the chip can
operate at constant frequency from continuous conduc-
tion mode (CCM) at full load, down into deep discontinu-
ous conduction mode (DCM) at light load. Prior to skip-
ping pulses at very light load (i.e., < 5% of full load), the
controller will operate with a minimum switch on-time in
DCM. Pulse skipping prevents a loss of control of the
output at very light loads and reduces output voltage
ripple.
Efficiency Considerations: How Much Does V
Sensing Help?
The efficiency of a switching regulator is equal to the
output power divided by the input power ( 100%). Per-
cent efficiency can be expressed as:
where L1, L2, etc. are the individual loss components as
a percentage of the input power. It is often useful to
analyze individual losses to determine what is limiting the
efficiency and which change would produce the most
improvement. Although all dissipative elements in the
circuit produce losses, four main sources usually account
for the majority of the losses in LTC1871 application
circuits:
IN(MAX)
% Efficiency = 100% – (L1 + L2 + L3 + …),
. The alternative is to either increase the value of
L
is substantially less than I
U
L
is small, it takes multiple cycles for
U
L
between 25% and 40% of
BURST(PEAK)
W
BURST
. During this
U
CC
DS
. This can
). In this
1. The supply current into V
2. Power MOSFET switching and conduction losses. The
of the DC supply current I
Characteristics) and the MOSFET driver and control
currents. The DC supply current into the V
typically about 550 A and represents a small power
loss (much less than 1%) that increases with V
driver current results from switching the gate capaci-
tance of the power MOSFET; this current is typically
much larger than the DC current. Each time the MOSFET
is switched on and then off, a packet of gate charge Q
is transferred from INTV
dQ/dt is a current that must be supplied to the INTV
capacitor through the V
the IC is operating in CCM:
technique of using the voltage drop across the power
MOSFET to close the current feedback loop was chosen
because of the increased efficiency that results from not
having a sense resistor. The losses in the power MOSFET
are equal to:
The I
discrete sense resistor can be calculated almost by
inspection.
To understand the magnitude of the improvement with
this V
output power supply shown in Figure 1. The maximum
load current is 7A (10A peak) and the duty cycle is 39%.
Assuming a ripple current of 40%, the peak inductor
current is 13.8A and the average is 11.5A. With a
maximum sense voltage of about 140mV, the sense
I
P
P
Q(TOT)
R SENSE
IC
2
(
DS
P
R power savings that result from not having a
= V
FET
sensing technique, consider the 3.3V input, 5V
IN
)
I
• (I
k V
Q
1
= f • Q
I
Q
O MAX
(
1
O
+ f • Q
D
I
O MAX
1 85
MAX
.
(
D
G
)
MAX
G
IN
1
)
)
2
I
IN
CC
O MAX
pin by an external supply. If
(
. The V
D
2
R
Q
to ground. The resulting
MAX
DS ON
(given in the Electrical
R
)
(
SENSE
IN
)
C
current is the sum
RSS
D
LTC1871
MAX
D
MAX
f
IN
19
T
IN
pin is
. The
CC
G

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