LTC1871 Linear Technology, LTC1871 Datasheet - Page 9

• Manufacturer Part Number: LTC1871
• Description: Wide Input Range/ No RSENSE Current Mode Boost/ Flyback and SEPIC Controller
• Manufacturer: Linear Technology

OPERATIO
Programming the Operating Mode
For applications where maximizing the efficiency at very
light loads (e.g., <100 A) is a high priority, the current in
the output divider could be decreased to a few micro-
amps and Burst Mode operation should be applied (i.e.,
the MODE/SYNC pin should be connected to ground). In
applications where fixed frequency operation is more
critical than low current efficiency, or where the lowest
output ripple is desired, pulse-skip mode operation should
be used and the MODE/SYNC pin should be connected to
the INTV
mode (DCM) operation down to near the limit defined by
the chip’s minimum on-time (about 175ns). Below this
output current level, the converter will begin to skip
cycles in order to maintain output regulation. Figures 3
and 4 show the light load switching waveforms for Burst
Mode and pulse-skip mode operation for the converter in
Figure 1.
Burst Mode Operation
Burst Mode operation is selected by leaving the MODE/
SYNC pin unconnected or by connecting it to ground. In
normal operation, the range on the I
to no load to full load is 0.30V to 1.2V. In Burst Mode
operation, if the error amplifier EA drives the I
below 0.525V, the buffered I
parator C1 will be clamped at 0.525V (which corresponds
to 25% of maximum load current). The inductor current
peak is then held at approximately 30mV divided by the
50mV/DIV
5A/DIV
V
OUT
CC
I
L
Figure 3. LTC1871 Burst Mode Operation
(MODE/SYNC = 0V) at Low Output Current
pin. This allows discontinuous conduction
V
V
I
OUT
IN
OUT
= 3.3V
= 500mA
= 5V
U
MODE/SYNC = 0V
(Burst Mode OPERATION)
10 s/DIV
TH
input to the current com-
TH
pin corresponding
1871 F03
TH
voltage
power MOSFET R
the Burst Mode comparator B1 will turn off the power
MOSFET and scale back the quiescent current of the IC to
250 A (sleep mode). In this condition, the load current will
be supplied by the output capacitor until the I
rises above the 50mV hysteresis of the burst comparator.
At light loads, short bursts of switching (where the aver-
age inductor current is 20% of its maximum value) fol-
lowed by long periods of sleep will be observed, thereby
greatly improving converter efficiency. Oscilloscope wave-
forms illustrating Burst Mode operation are shown in
Figure 3.
Pulse-Skip Mode Operation
With the MODE/SYNC pin tied to a DC voltage above 2V,
Burst Mode operation is disabled. The internal, 0.525V
buffered I
to directly control the current comparator from no load to
full load. With no load, the I
the power MOSFET is turned off and sleep mode is
invoked. Oscilloscope waveforms illustrating this mode of
operation are shown in Figure 4.
When an external clock signal drives the MODE/SYNC pin
at a rate faster than the chip’s internal oscillator, the
oscillator will synchronize to it. In this synchronized mode,
Burst Mode operation is disabled. The constant frequency
associated with synchronized operation provides a more
controlled noise spectrum from the converter, at the
expense of overall system efficiency of light loads.
Figure 4. LTC1871 Low Output Current Operation with Burst
Mode Operation Disabled (MODE/SYNC = INTV
50mV/DIV
5A/DIV
V
OUT
I
L
TH
V
V
I
OUT
burst clamp is removed, allowing the I
IN
OUT
= 3.3V
= 500mA
= 5V
DS(ON)
MODE/SYNC = INTV
(PULSE-SKIP MODE)
. If the I
2 s/DIV
TH
pin is driven below 0.30V,
TH
CC
pin drops below 0.30V,
LTC1871
1871 F04
CC
)
TH
voltage
TH
9
pin