LTC3826 Linear Technology, LTC3826 Datasheet - Page 18

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LTC3826

Manufacturer Part Number
LTC3826
Description
2-Phase Synchronous Step-Down Controller
Manufacturer
Linear Technology
Datasheet

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LTC3826
APPLICATIONS INFORMATION
The term (1 + δ) is generally given for a MOSFET in the
form of a normalized R
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
The optional Schottky diodes D3 and D4 shown in Figure 14
conduct during the dead-time between the conduction of
the two power MOSFETs. This prevents the body diode of
the bottom MOSFET from turning on, storing charge during
the dead-time and requiring a reverse recovery period that
could cost as much as 3% in effi ciency at high V
to 3A Schottky is generally a good compromise for both
regions of operation due to the relatively small average
current. Larger diodes result in additional transition losses
due to their larger junction capacitance.
C
The selection of C
ture and its impact on the worst-case RMS current drawn
through the input network (battery/fuse/capacitor). It can be
shown that the worst-case capacitor RMS current occurs
when only one controller is operating. The controller with
the highest (V
formula below to determine the maximum RMS capacitor
current requirement. Increasing the output current drawn
from the other controller will actually decrease the input
RMS ripple current from its maximum value. The out-of-
phase technique typically reduces the input capacitor’s RMS
ripple current by a factor of 30% to 70% when compared
to a single phase power supply solution.
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle (V
large voltage transients, a low ESR capacitor sized for the
maximum RMS current of one channel must be used. The
maximum RMS capacitor current is given by:
This formula has a maximum at V
= I
used for design because even signifi cant deviations do not
18
IN
OUT
C
and C
IN
/2. This simple worst-case condition is commonly
 Required I
OUT
Selection
OUT
)(I
IN
RMS
OUT
is simplifi ed by the 2-phase architec-
DS(ON)
) product needs to be used in the
I
MAX
V
IN
vs Temperature curve, but
(
V
OUT
IN
OUT
= 2V
)
)/(V
(
V
OUT
IN
IN
). To prevent
– V
, where I
OUT
IN
. A 1A
)
1/2
RMS
offer much relief. Note that capacitor manufacturers’ ripple
current ratings are often based on only 2000 hours of life.
This makes it advisable to further derate the capacitor, or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may be paralleled to meet
size or height requirements in the design. Due to the high
operating frequency of the LTC3826, ceramic capacitors
can also be used for C
if there is any question.
The benefi t of the LTC3826 2-phase operation can be cal-
culated by using the equation above for the higher power
controller and then calculating the loss that would have
resulted if both controller channels switched on at the same
time. The total RMS power lost is lower when both control-
lers are operating due to the reduced overlap of current
pulses required through the input capacitor’s ESR. This is
why the input capacitor’s requirement calculated above for
the worst-case controller is adequate for the dual controller
design. Also, the input protection fuse resistance, battery
resistance, and PC board trace resistance losses are also
reduced due to the reduced peak currents in a 2-phase
system. The overall benefi t of a multiphase design will
only be fully realized when the source impedance of the
power supply/battery is included in the effi ciency testing.
The sources of the top MOSFETs should be placed within
1cm of each other and share a common C
the sources and C
current resonances at V
A small (0.1μF to 1μF) bypass capacitor between the chip V
pin and ground, placed close to the LTC3826, is also sug-
gested. A 10Ω resistor placed between C
pin provides further isolation between the two channels.
The selection of C
resistance (ESR). Typically, once the ESR requirement
is satisfi ed, the capacitance is adequate for fi ltering. The
output ripple (ΔV
V
OUT
I
RIPPLE
OUT
IN
OUT
may produce undesirable voltage and
) is approximated by:
ESR +
IN
. Always consult the manufacturer
is driven by the effective series
IN
.
8fC
1
OUT
IN
IN
(C1) and the V
(s). Separating
3826fc
IN
IN

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