LTC3826 Linear Technology, LTC3826 Datasheet - Page 23

• Manufacturer Part Number: LTC3826
• Description: 2-Phase Synchronous Step-Down Controller
• Manufacturer: Linear Technology

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APPLICATIONS INFORMATION
Figure 9. Relationship Between Oscillator Frequency and Voltage
at the PLLLPF Pin When Synchronizing to an External Clock
to PLLIN/MODE, is shown in Figure 9 and specifi ed in the
Electrical Characteristics table. Note that the LTC3826 can
only be synchronized to an external clock whose frequency
is within range of the LTC3826’s internal VCO, which is
nominally 115kHz to 800kHz. This is guaranteed to be
between 140kHz and 650kHz. A simplifi ed block diagram
is shown in Figure 10.
If the external clock frequency is greater than the internal
oscillator’s frequency, f
tinuously from the phase detector output, pulling up the
PLLLPF pin. When the external clock frequency is less
than f
the PLLLPF pin. If the external and internal frequencies
are the same but exhibit a phase difference, the current
sources turn on for an amount of time corresponding to
the phase difference. The voltage on the PLLLPF pin is
adjusted until the phase and frequency of the internal and
external oscillators are identical. At the stable operating
point, the phase detector output is high impedance and
the fi lter capacitor C
The loop fi lter components, C
the current pulses from the phase detector and provide a
stable input to the voltage-controlled oscillator. The fi lter
components C
OSC
, current is sunk continuously, pulling down
900
800
700
600
500
400
300
200
100
0
0
LP
and R
0.5
LP
PLLLPF VOLTAGE (V)
OSC
holds the voltage.
LP
1
, then current is sourced con-
determine how fast the loop
1.5
LP
and R
2
3826 F09
LP
2.5
, smooth out
acquires lock. Typically R
0.01μF .
Typically, the external clock (on PLLIN/MODE pin) input high
threshold is 1.6V, while the input low threshold is 1.2V.
Table 2 summarizes the different states in which the
PLLLPF pin can be used.
Table 2
PLLLPF PIN
0V
Floating
INTV
RC Loop Filter
Minimum On-Time Considerations
Minimum on-time t
that the LTC3826 is capable of turning on the top MOSFET.
It is determined by internal timing delays and the gate
charge required to turn on the top MOSFET. Low duty
cycle applications may approach this minimum on-time
limit and care should be taken to ensure that:
OSCILLATOR
EXTERNAL
t
CC
ON MIN
(
Figure 10. Phase-Locked Loop Block Diagram
)
PLLIN/
MODE
<
PLLIN/MODE PIN
V
V
IN
OUT
Clock Signal
DC Voltage
DC Voltage
DC Voltage
( )
f
FREQUENCY
ON(MIN)
DETECTOR
DIGITAL
PHASE/
LP
is the smallest time duration
= 10k and C
Phase-Locked to External Clock
2.4V
FREQUENCY
LTC3826
250kHz
390kHz
530kHz
LP
PLLLPF
is 2200pF to
R
LP
OSCILLATOR
23
3826 F10
C
LP
3826fc