SC16C850V NXP Semiconductors, SC16C850V Datasheet - Page 3
SC16C850V
Manufacturer Part Number
SC16C850V
Description
XScale VLIO bus interface
Manufacturer
NXP Semiconductors
Datasheet
1.SC16C850V.pdf
(47 pages)
www.DataSheet.in
NXP Semiconductors
4. Block diagram
SC16C850V_4
Product data sheet
Fig 1.
AD0 to AD7
Block diagram of SC16C850V
LOWPWR
RESET
IOW
IOR
LLA
INT
CS
SC16C850V
INTERRUPT
REGISTER
CONTROL
CONTROL
DATA BUS
CONTROL
SELECT
POWER
LOGIC
LOGIC
LOGIC
DOWN
AND
Single UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
Rev. 04 — 14 January 2008
XTAL1
GENERATOR
CLOCK AND
BAUD RATE
TRANSMIT
REGISTER
REGISTER
CONTROL
CONTROL
RECEIVE
LOGIC
LOGIC
FLOW
FLOW
FIFO
FIFO
XTAL2
TRANSMIT
REGISTER
REGISTER
RECEIVE
SHIFT
SHIFT
CONTROL
MODEM
LOGIC
ENCODER
DECODER
SC16C850V
IR
IR
002aac556
© NXP B.V. 2008. All rights reserved.
TX
RX
DTR
RTS
CTS
RI
CD
DSR
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