SC16C850V NXP Semiconductors, SC16C850V Datasheet - Page 33

• Manufacturer Part Number: SC16C850V
• Description: XScale VLIO bus interface
• Manufacturer: NXP Semiconductors

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NXP Semiconductors
SC16C850V_4
Product data sheet
7.22 Advanced Feature Control Register 2 (AFCR2)
Table 32.
Bit
7:6
5
4
3
2
1
0
Symbol
AFCR2[7:6]
AFCR2[5]
AFCR2[4]
AFCR2[3]
AFCR2[2]
AFCR2[1]
AFCR2[0]
Advanced Feature Control Register 2 bits description
Single UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
Description
reserved
RTSInvert. Invert RTS or DTR signal in auto 9-bit mode.
RTSCon. Enable the transmitter to control RTS or DTR signal in auto 9-bit
mode.
RS485 RTS/DTR. Select RTS or DTR pin to control the external
transceiver.
TXDisable. Disable transmitter.
RXDisable. Disable receiver.
9-bitMode. Enable 9-bit mode or Multidrop (RS-485) mode.
Rev. 04 — 14 January 2008
logic 0 = RTS or DTR is set to 0 by the UART during transmission, and to
1 during reception
logic 1 = RTS or DTR is set to 1 by the UART during transmission, and to
0 during reception
logic 0 = transmitter does not control RTS or DTR signal
logic 1 = transmitter controls RTS or DTR signal
logic 0 = RTS pin is used to control the external transceiver
logic 1 = DTR pin is used to control the external transceiver
logic 0 = transmitter is enabled
logic 1 = transmitter is disabled
logic 0 = receiver is enabled
logic 1 = receiver is disabled
logic 0 = normal RS-232 mode
logic 1 = enable 9-bit mode
SC16C850V
© NXP B.V. 2008. All rights reserved.
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