MBM29DS163TE Fujitsu Media Devices, MBM29DS163TE Datasheet - Page 8

• Manufacturer Part Number: MBM29DS163TE
• Description: (MBM29DS163BE/TE) FLASH MEMORY CMOS 16 M (2 M X 8/1 M X 16) BIT
• Manufacturer: Fujitsu Media Devices

8
MBM29DS163TE/BE
Legend : L
*1 : Manufacturer and device codes may also be accessed via a command register write sequence. See
*2 : Refer to the section on Sector Group Protection.
*3 : WE can be V
*4 : V
*5 : Also used for the extended sector group protection.
Auto-Select Manufacturer Code*
Auto-Select Device Code*
Read*
Standby
Output Disable
Write (Program/Erase)
Enable Sector Group Protection*
Verify Sector Group Protection*
Temporary Sector Group Unprotection*
Reset (Hardware) /Standby
Boot Block Sector Write Protection
Auto-Select Manufacturer Code*
Auto-Select Device Code*
Read*
Standby
Output Disable
Write (Program/Erase)
Enable Sector Group Protection
*
Verify Sector Group Protection*
Temporary Sector Group
Unprotection*
Reset (Hardware) /Standby
Boot Block Sector Write Protection
2,
DEVICE BUS OPERATION
*
4
“MBM29DS163TE/BE Command Definitions” Table.
CC
3
3
must be between the minimum and maximum of the operation range.
Operation
V
5
IL
Operation
, H
IL
if OE is V
V
IH
MBM29DS163TE/BE User Bus Operations (BYTE
MBM29DS163TE/BE User Bus Operations (BYTE
, X
1
1
IL
V
, OE at V
IL
2,
2,
1
1
or V
2,
*
*
4
4
*
4
IH
CE OE WE
,
H
X
X
X
L
L
L
L
L
L
L
IH
5
initiates the write operations.
V
CE OE WE A
X
H
H
X
X
X
L
L
L
L
10
H
X
X
X
L
L
L
L
L
L
L
ID
Pulse input. See DC Characteristics for voltage levels.
V
H
H
H
X
H
H
X
X
X
L
H
H
L
L
L
X
L
X
X
X
ID
DQ
H
H
H
H
H
X
L
X
X
X
A
A
A
X
X
X
X
X
L
L
L
L
-1
-1
-1
15
/
A
A
H
X
X
X
X
X
L
L
L
0
0
0
A
A
A
H
X
X
X
X
X
L
L
L
0
0
0
A
A
A
X
X
H
H
X
X
X
L
L
1
1
1
A
A
A
X
X
H
H
X
X
X
L
L
1
1
1
A
A
A
X
X
X
X
X
L
L
L
L
6
6
6
A
A
A
X
X
X
X
X
L
L
L
L
6
6
6
V
V
V
V
A
A
A
X
X
X
X
X
ID
ID
ID
ID
9
9
9
V
V
V
V
V
V
A
A
A
X
X
X
X
X
IH
IL
ID
ID
ID
ID
DQ
9
9
9
) Table
) Table
High-Z
High-Z
High-Z
15
Code
Code
Code
D
D
DQ
High-Z
High-Z
High-Z
X
X
X
to DQ
OUT
Code
Code
Code
D
IN
DQ
D
X
X
X
OUT
7
IN
to
0
0
RESET
RESET
V
H
H
H
H
H
H
H
H
X
L
V
ID
H
H
H
H
H
H
H
H
X
L
ID
ACC
WP/
ACC
WP/
X
X
X
X
X
X
X
X
X
X
L
X
X
X
X
X
X
X
X
X
X
L