fs3862 Fortune Semiconductor Corporation, fs3862 Datasheet - Page 25

• Manufacturer Part Number: fs3862
• Description: 8-bit Mcu With 1k Program Eprom, 64-byte Sram, 5-bit I/o Port, Intelligent Charger Management Controller
• Manufacturer: Fortune Semiconductor Corporation

CALL
Syntax
Operation
Flag Affected
Description
Cycle
CLRWDT
Syntax
Operation
Flag Affected
Description
Cycle
Example:
CLRWDT
DECF
Syntax
Operation
Flag Affected
Description
Cycle
Example 1:
DECF OPERAND,0
Example 2:
DECF OPERAND,1
Rev. 1.3
Subroutine CALL
CALL k
0 ≤ k ≤ 1FFFh
Push Stack
[Top Stack] ← PC + 1
PC ← k
None
Subroutine Call. First, return
address PC + 1 is pushed onto
the stack. The immediate address
is loaded into PC.
2
Clear watch dog timer
CLRWDT
Watch dog timer counter will be
reset
None
CLRWDT instruction will reset
watch dog timer counter.
1
After instruction:
Decrement f
DECF f, d
0 ≤ f ≤ 255
d ∈ [0,1]
[Destination] ← [f] -1
Z
[f] is decremented. If d is 0, the
result is stored in the W register. If
d is 1, the result is stored back in
[f].
1
Before instruction:
After instruction:
Before instruction:
After instruction:
WDT = 0
TO = 1
PD = 1
W = 88h, OPERAND = 23h
W = 22h, OPERAND = 23h
W = 88h, OPERAND = 23h
W = 88h, OPERAND = 22h
CLRF
Syntax
Operation
Flag Affected
Description
Cycle
Example:
CLRF WORK
COMF
Syntax
Operation
Flag Affected
Description
Cycle
Example 1:
COMF OPERAND,0
Example 2:
COMF OPERAND,1
DECFSZ
Syntax
Operation
Flag Affected
Description
Cycle
Example:
Node DECFSZ FLAG, 1
OP1
OP2
:
:
Clear f
CLRF f
0 ≤ f ≤ 255
[f] ← 0
None
Reset the content of memory
address f
1
Before instruction:
After instruction:
Complement f
COMF f, d
0 ≤ f ≤ 255
d ∈ [0,1]
[f] ← NOT([f])
Z
[f] is complemented. If d is 0, the
result is stored in the W register. If
d is 1, the result is stored back in
[f]
1
Before instruction:
After instruction:
W = DCh, OPERAND = 23h
Before instruction:
After instruction:
Decrement f, skip if zero
DECFSZ f, d
0 ≤ f ≤ FFh
d ∈ [0,1]
[Destination] ← [f] -1, skip if the
result is zero
None
[f] is decremented. If d is 0, the
result is stored in the W register. If
d is 1, the result is stored back in
[f].
fetched instruction is discarded
and a NOP is executed instead of
making it a two-cycle instruction.
1, 2
Before instruction:
After instruction:
If the result is 0, then the next
WORK = 5Ah
WORK = 00h
W = 88h, OPERAND = 23h
W = 88h, OPERAND = 23h
W = 88h, OPERAND = DCh
PC = address (Node)
[FLAG] = [FLAG] - 1
If [FLAG] = 0
If [FLAG] ≠ 0
PC = address(OP1)
PC = address(OP2)
FS3862
25/32