ds26518 Maxim Integrated Products, Inc., ds26518 Datasheet - Page 243

• Manufacturer Part Number: ds26518
• Description: 8-port T1/e1/j1 Transceiver
• Manufacturer: Maxim Integrated Products, Inc.

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Note: All bits in this register are latched and can create interrupts.
Bit 6: BERT Bit Error Detected Event (BBED). A latched bit that is set when a bit error is detected. The receive
BERT must be in synchronization for it to detect bit errors.
Bit 5: BERT Bit Counter Overflow Event (BBCO). A latched bit that is set when the 32-bit BERT bit counter
(BBC) overflows.
Bit 4: BERT Error Counter Overflow Event (BECO). A latched bit that is set when the 24-bit BERT error counter
(BEC) overflows.
Bit 3: BERT Receive All-Ones Condition (BRA1). A latched bit that is set when 32 consecutive ones are
received.
Bit 2: BERT Receive All-Zeros Condition (BRA0). A latched bit that is set when 32 consecutive zeros are
received.
Bit 1: BERT Receive Loss of Synchronization Condition (BRLOS). A latched bit that is set whenever the
receive BERT begins searching for a pattern.
Bit 0: BERT in Synchronization Condition (BSYNC). Will be set when the incoming pattern matches for 32
consecutive bit positions.
—
7
0
BLSR
BERT Latched Status Register
110Eh + (10h x (n - 1)) : where n = 1 to 8
BBED
6
0
BBCO
5
0
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BECO
4
0
BRA1
3
0
DS26518 8-Port T1/E1/J1 Transceiver
BRA0
2
0
BRLOS
1
0
BSYNC
0
0