74LV74PW,118 NXP Semiconductors, 74LV74PW,118 Datasheet - Page 2

• Manufacturer Part Number: 74LV74PW,118
• Description: IC DUAL D FF POSEDG TRIG 14TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74LVr
• Type: D-Typer

Specifications of 74LV74PW,118

• Output Type: Differential
• Package / Case: 14-TSSOP
• Function: Set(Preset) and Reset
• Number Of Elements: 2
• Number Of Bits Per Element: 1
• Frequency - Clock: 56MHz
• Trigger Type: Positive Edge
• Current - Output High, Low: 12mA, 12mA
• Voltage - Supply: 1 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Circuits: 2
• Logic Family: LV
• Logic Type: D-Type Edge Triggered Flip-Flop
• Polarity: Inverting/Non-Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 11 ns at 3.3 V
• High Level Output Current: - 12 mA
• Low Level Output Current: 12 mA
• Supply Voltage (max): 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 1 V
• Delay Time - Propagation: -
• Technology: CMOS
• Number Of Bits: 2
• Number Of Elements: 2
• Clock-edge Trigger Type: Positive-Edge
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSSOP
• Frequency (max): 56MHz
• Operating Supply Voltage (min): 1V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 14
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Delay Time - Propagation: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 74LV74PW-T; 74LV74PW-T; 935175140118

NXP Semiconductors
3. Ordering information
Table 1.
4. Functional diagram
74LV74_3
Product data sheet
Type number Package
74LV74N
74LV74D
74LV74DB
74LV74PW
74LV74PW
Fig 1. Logic symbol
Ordering information
Temperature range Name
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
10
12
11
13
4
2
3
1
1SD
1D
1CP
1RD
2SD
2D
2CP
2RD
D
CP
D
CP
SD
RD
SD
RD
FF
FF
Q
Q
Q
Q
1Q
1Q
2Q
2Q
mna420
DIP14
SO14
SSOP14
TSSOP14
DHVQFN14 plastic dual in-line compatible thermal enhanced very thin
5
6
9
8
Rev. 03 — 28 September 2007
Dual D-type flip-flop with set and reset; positive edge-trigger
Description
plastic dual in-line package; 14 leads (300 mil)
plastic small outline package; 14 leads;
body width 3.9 mm
plastic shrink small outline package; 14 leads;
body width 5.3 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
quad flat package; no leads; 14 terminals;
body 2.5
Fig 2. IEC logic symbol
3
0.85 mm
10
11
12
13
4
3
2
1
1D
1D
S
R
S
R
C1
C1
mna419
5
6
9
8
© NXP B.V. 2007. All rights reserved.
74LV74
Version
SOT27-1
SOT108-1
SOT337-1
SOT402-1
SOT762-1
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