74LV74PW,118 NXP Semiconductors, 74LV74PW,118 Datasheet - Page 8

• Manufacturer Part Number: 74LV74PW,118
• Description: IC DUAL D FF POSEDG TRIG 14TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74LVr
• Type: D-Typer

Specifications of 74LV74PW,118

• Output Type: Differential
• Package / Case: 14-TSSOP
• Function: Set(Preset) and Reset
• Number Of Elements: 2
• Number Of Bits Per Element: 1
• Frequency - Clock: 56MHz
• Trigger Type: Positive Edge
• Current - Output High, Low: 12mA, 12mA
• Voltage - Supply: 1 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Circuits: 2
• Logic Family: LV
• Logic Type: D-Type Edge Triggered Flip-Flop
• Polarity: Inverting/Non-Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 11 ns at 3.3 V
• High Level Output Current: - 12 mA
• Low Level Output Current: 12 mA
• Supply Voltage (max): 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 1 V
• Delay Time - Propagation: -
• Technology: CMOS
• Number Of Bits: 2
• Number Of Elements: 2
• Clock-edge Trigger Type: Positive-Edge
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSSOP
• Frequency (max): 56MHz
• Operating Supply Voltage (min): 1V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 14
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Delay Time - Propagation: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 74LV74PW-T; 74LV74PW-T; 935175140118

NXP Semiconductors
Table 8.
GND = 0 V; For test circuit see
[1]
[2]
[3]
[4]
74LV74_3
Product data sheet
Symbol Parameter
t
f
C
h
max
PD
Typical values are measured at T
t
Typical values are measured at nominal supply voltage (V
C
P
f
C
V
N = number of inputs switching
pd
i
(C
D
CC
PD
= input frequency in MHz; f
L
is the same as t
= output load capacitance in pF
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in Volts
hold time
maximum
frequency
power
dissipation
capacitance
PD
V
Dynamic characteristics
CC
2
V
CC
f
o
2
) = sum of the outputs
PLH
f
i
N + (C
and t
Conditions
nD to nCP; see
see
per flip-flop; V
PHL
o
Figure
= output frequency in MHz
V
V
V
V
V
V
V
V
V
V
L
.
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
Figure 6
amb
V
= 1.2 V
= 2.0 V
= 2.7 V
= 3.0 V to 3.6 V
= 4.5 V to 5.5 V
= 2.0 V
= 2.7 V
= 3.3 V; C
= 3.0 V to 3.6 V
= 4.5 V to 5.5 V
CC
= 25 C.
8.
2
…continued
f
o
) where:
I
= GND to V
Figure 6
L
= 15 pF
Rev. 03 — 28 September 2007
Dual D-type flip-flop with set and reset; positive edge-trigger
CC
CC
D
= 3.3 V and V
in W).
[3]
[3]
[3]
[3]
[4]
CC
Min
14
50
60
70
3
3
3
3
= 5.0 V).
-
-
-
40 C to +85 C
Typ
100
110
40
90
76
24
10
2
2
2
2
[1]
Max
-
-
-
-
-
-
-
-
-
-
-
40 C to +125 C Unit
Min
12
40
48
56
3
3
3
3
-
-
-
© NXP B.V. 2007. All rights reserved.
74LV74
Max
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
MHz
MHz
pF
MHz
MHz
MHz
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