si5338b Silicon Laboratories, si5338b Datasheet - Page 10

• Manufacturer Part Number: si5338b
• Description: I2c-programmable Any-rate , Any-output Quad Clock Generator
• Manufacturer: Silicon Laboratories

Si5338
Table 8. Jitter Specifications
(V
Table 9. I
10
Random Phase Jitter
(12 kHz–20 MHz)
Deterministic Phase Jitter
Total Jitter
(12 kHz–20 MHz)
Cycle-Cycle Jitter
Period Jitter
PCI Express 2.0
Random Phase Jitter
(1.5 MHz—50 MHz)
OC-12 RMS Phase Jitter
(12 kHz—5 MHz)
GbE RMS Phase Jitter
(1.875—20 MHz)
Notes:
LOW level input
voltage:
HIGH level input
voltage:
Notes:
DD
Parameter
1. Tested with Agilent 90804 oscilloscope. See “AN357: Optimized Time Domain Clock Jitter Measurements”.
2. All jitter measurements are with LVDS output format.
1. Only I
2. Refer to NXP’s UM10204 I
3. Compliant with Fast Mode+ pending characterization.
= 1.8 V –5% to +10%, 2.5 V ±10%, or 3.3 V ±10%, T
www.nxp.com/acrobat_download/usermanuals/UM10204_3.pdf.
Parameter
2
C Specifications (SCL,SDA)
2
1
C pull up voltages (VDDI2C) of 1.71 to 3.63 V are supported.
1
Symbol
V
V
IHI2C
ILI2C
T
J
2
C-bus specification and user manual, revision 03, for further details:
Test Condition
= D
Symbol
t
R
PERIOD
R
JOC12
t
JGBe
R
D
R
CC
J
+14xR
J
J
J
J
2
Output and feedback
MultiSynth in Integer
mode
MultiSynth operated in
fractional mode
MultiSynth operated in
integer mode
MultiSynth operated in
fractional mode
MultiSynth operated in
integer mode
N = 10,000 cycles
CLKIN = 25 MHz
All CLKns at 100 MHz
CLKIN = 25 MHz
All CLKns at 100 MHz
Spread Spectrum not
enabled.
All CLKns at 125 MHz
CLKIN = 19.44 MHz
CLKIN = 25 MHz
Test Condition
A
All CLKns at
0.7*V
155.52 MHz
Rev. 0.3
= –40 to 85 °C)
–0.5
Min
Standard Mode
DDI2C
0.3*V
Max
3.63
DDI2C
Min
—
—
—
—
—
—
—
—
—
—
V
DDI2C
–0.5
0.7*
Min
TBD
TBD
TBD
Typ
30
Fast Mode
—
—
—
—
—
1
1
0.3*V
Max
20
48
32
60
50
2
4
2
2
2
3
Max
3.63
DDI2C
ps pk-pk
ps pk-pk
ps pk-pk
ps pk-pk
ps pk-pk
ps pk-pk
ps RMS
ps RMS
ps RMS
ps RMS
1
Unit
Unit
V
V