isl12022m Intersil Corporation, isl12022m Datasheet - Page 24

• Manufacturer Part Number: isl12022m
• Description: Real Time Clock With Embedded Crystal, ??5ppm Accuracy
• Manufacturer: Intersil Corporation

select bits with “1101111” or “1010111”. Upon a correct
compare, the device outputs an acknowledge on the SDA line.
Following the Slave Byte is a one byte word address. The word
address is either supplied by the master device or obtained
from an internal counter. On power-up, the internal address
counter is set to address 00h, so a current address read starts
at address 00h. When required, as part of a random read, the
master must supply the 1 Word Address Bytes, as shown in
Figure 20.
In a random read operation, the slave byte in the “dummy write”
portion must match the slave byte in the “read” section. For a
random read of the Control/Status Registers, the slave byte
must be “1101111x” in both places.
Write Operation
A Write operation requires a START condition, followed by a
valid Identification Byte, a valid Address Byte, a Data Byte,
and a STOP condition. After each of the three bytes, the
ISL12022M responds with an ACK. At this time, the I
interface enters a standby state.
Read Operation
A Read operation consists of a three byte instruction, followed
by one or more Data Bytes (see Figure 20). The master
initiates the operation issuing the following sequence: a
START, the Identification byte with the R/W bit set to “0”, an
Address Byte, a second START, and a second Identification
byte with the R/W bit set to “1”. After each of the three bytes,
the ISL12022M responds with an ACK. Then the ISL12022M
transmits Data Bytes as long as the master responds with an
ACK during the SCL cycle following the eighth bit of each
byte. The master terminates the read operation (issuing a
FIGURE 18. SLAVE ADDRESS, WORD ADDRESS, AND DATA
A7
D7
1
FROM THE
SIGNALS
MASTER
SIGNALS FROM
SIGNAL AT
A6
D6
1
THE SLAVE
SDA
A5
D5
0
BYTES
S
A
R
T
T
A4
D4
1
1
IDENTIFICATION
1
BYTE WITH
A3
D3
0
1
R/W = 0
1 1 1 1
24
1
A2
D2
FIGURE 20. READ SEQUENCE (CSR SLAVE ADDRESS SHOWN)
0
1
A1
D1
A
C
K
R/W
A0
D0
ADDRESS
BYTE
SLAVE
ADDRESS BYTE
WORD ADDRESS
DATA BYTE
2
C
A
C
K
ISL12022M
S
A
R
T
T
IDENTIFICATION
1
BYTE WITH
1
R/W = 1
0
1 1 1 1
STOP condition) following the last bit of the last Data Byte
(see Figure 20).
The Data Bytes are from the memory location indicated by
an internal pointer. This pointer’s initial value is determined
by the Address Byte in the Read operation instruction, and
increments by one during transmission of each Data Byte.
After reaching the memory location 13h, the pointer “rolls
over” to 00h, and the device continues to output data for
each ACK received.
Application Section
Battery Backup Details
The ISL12022M has automatic switchover to battery backup
when the V
variety of backup sources can be used, including standard
and rechargeable lithium, supercapacitors, or regulated
secondary sources. The serial interface is disabled in battery
backup, while the oscillator and RTC registers are
operational. The SRAM register contents are powered to
preserve their contents as well.
The input voltage range for V
mind the temperature compensation only operates for
V
operate with a V
changed before discharging to that level. It is strongly
advised to monitor the low battery indicators in the status
registers and take action to replace discharged batteries.
If a supercapacitor is used, it is possible that it may discharge
to below 1.8V during prolonged power-down. Once powered
up, the device may lose serial bus communications until both
V
situation, including situations where a battery may discharge
deeply, the circuit in Figure 19 can be used.
V
TO 5.5V
BAT
DD
DD
0.1µF
C
= 2.7V
FIGURE 19. SUGGESTED BATTERY BACKUP CIRCUIT
and V
IN
> 2.7V. Note that the device is not guaranteed to
1
A
C
K
BAT
DD
FIRST READ
DATA BYTE
drops below the V
VDD
are powered down together. To avoid that
ISL12022M
BAT
GND
< 1.8V, so the battery should be
VBAT
A
C
K
BAT
J
BAT
0.1µF
C
BAT
BAT
is 1.8V to 5.5V, but keep in
A
C
K
mode threshold. A wide
BAT43W
LAST READ
DATA BYTE
D
BAT
December 18, 2008
+
V
BAT
TO 3.2V
FN6668.4
= 1.8V
S
O
P
T