ltc2182 Linear Technology Corporation, ltc2182 Datasheet - Page 21

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ltc2182

Manufacturer Part Number
ltc2182
Description
16-bit, 65msps/ 40msps/25msps Low Power Dual Adcs
Manufacturer
Linear Technology Corporation
Datasheet

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APPLICATIONS INFORMATION
Alternatively C1 can be replaced by a standard 2.2µF
capacitor between REFH and REFL (see Figure 8b). The
capacitors should be as close to the pins as possible (not
on the back side of the circuit board).
Figure 8c and Figure 8d show the recommended circuit
board layout for the REFH/REFL bypass capacitors. Note
that in Figure 8c, every pin of the interdigitated capacitor
(C1) is connected since the pins are not internally connected
in some vendors’ capacitors. In Figure 8d the REFH and
TIE TO GND FOR 1V RANGE;
C1: 2.2µF LOW INDUCTANCE
INTERDIGITATED CAPACITOR
TDK CLLE1AX7S0G225M
MURATA LLA219C70G225M
AVX W2L14Z225M
OR EQUIVALENT
TIE TO V
RANGE = 1.6 • V
0.625V < V
0.1µF
0.1µF
C2
C3
DD
Figure 8b. Alternative REFH/REFL Bypass Circuit
FOR 2V RANGE;
SENSE
1.25V
SENSE
CAPACITORS ARE 0402 PACKAGE SIZE
+
+
< 1.300V
C1
0.1µF
0.1µF
C3
C2
FOR
Figure 8a. Reference Circuit
+
+
2.2µF
SENSE
REFH
REFH
V
REFL
REFL
C1
2.2µF
REF
LTC2182
CONTROL
5
DETECT
RANGE
AND
REFH
REFH
REFL
REFL
1.25V BANDGAP
LTC2182
DIFF AMP
REFERENCE
INTERNAL ADC
HIGH REFERENCE
0.8x
INTERNAL ADC
LOW REFERENCE
218210 F08b
0.625V
BUFFER
218210 F08a
Encode Inputs
The signal quality of the encode inputs strongly affects
the A/D noise performance. The encode inputs should
be treated as analog signals – do not route them next to
digital traces on the circuit board. There are two modes
of operation for the encode inputs: the differential encode
mode (Figure 10), and the single-ended encode mode
(Figure 11).
The differential encode mode is recommended for si-
nusoidal, PECL, or LVDS encode inputs (Figure 12 and
Figure 13). The encode inputs are internally biased to 1.2V
through 10kΩ equivalent resistance. The encode inputs
can be taken above V
mode range is from 1.1V to 1.6V. In the differential encode
REFL pins are connected by short jumpers in an internal
layer. To minimize the inductance of these jumpers they
can be placed in a small hole in the GND plane on the
second board layer.
LTC2182/LTC2181/LTC2180
Figure 8c. Recommended Layout for the REFH/REFL
Bypass Circuit in Figure 8a
Figure 8d. Recommended Layout for the REFH/REFL
Bypass Circuit in Figure 8b
Figure 9. Using an External 1.25V Reference
REFERENCE
EXTERNAL
1.25V
DD
(up to 3.6V), and the common
SENSE
2.2µF
1µF
V
REF
LTC2182
218210
F09
21
218210f

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