ltc2182 Linear Technology Corporation, ltc2182 Datasheet - Page 29

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ltc2182

Manufacturer Part Number
ltc2182
Description
16-bit, 65msps/ 40msps/25msps Low Power Dual Adcs
Manufacturer
Linear Technology Corporation
Datasheet

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APPLICATIONS INFORMATION
REGISTER A3: OUTPUT MODE REGISTER (ADDRESS 03h)
REGISTER A4: DATA FORMAT REGISTER (ADDRESS 04h)
Bit 7
Bits 6-4
Bit 3
Bit 2
Bits 1-0
Bit 7-6
Bits 5-3
Bit 2
Bit 1
Bit 0
D7
D7
X
X
Unused, Don’t Care Bit.
ILVDS2:ILVDS0 LVDS Output Current Bits
000 = 3.5mA LVDS Output Driver Current
001 = 4.0mA LVDS Output Driver Current
010 = 4.5mA LVDS Output Driver Current
011 = Not Used
100 = 3.0mA LVDS Output Driver Current
101 = 2.5mA LVDS Output Driver Current
110 = 2.1mA LVDS Output Driver Current
111 = 1.75mA LVDS Output Driver Current
TERMON
0 = Internal Termination Off
1 = Internal Termination On. LVDS Output Driver Current is 2× the Current Set by ILVDS2:ILVDS0
OUTOFF
0 = Digital Outputs Are Enabled
1 = Digital Outputs Are Disabled and Have High Output Impedance
Note: If the Digital Outputs Are Disabled the Part Should Also Be Put in Sleep or Nap Mode (Both Channels).
OUTMODE1:OUTMODE0
00 = Full-Rate CMOS Output Mode
01 = Double Data Rate LVDS Output Mode
10 = Double Data Rate CMOS Output Mode
11 = Not Used
Unused, Don’t Care Bits.
OUTTEST2:OUTTEST0
000 = Digital Output Test Patterns Off
001 = All Digital Outputs = 0
011 = All Digital Outputs = 1
101 = Checkerboard Output Pattern. OF , D15-D0 Alternate Between 1 0101 0101 0101 0101 and 0 1010 1010 1010 1010
111 = Alternating Output Pattern. OF , D15-D0 Alternate Between 0 0000 0000 0000 0000 and 1 1111 1111 1111 1111
Note: Other Bit Combinations Are not Used
ABP
0 = Alternate Bit Polarity Mode Off
1 = Alternate Bit Polarity Mode On. Forces the Output Format to Be Offset Binary
RAND
0 = Data Output Randomizer Mode Off
1 = Data Output Randomizer Mode On
TWOSCOMP
0 = Offset Binary Data Format
1 = Two’s Complement Data Format
ILVDS2
D6
D6
X
Alternate Bit Polarity Mode Control Bit
Data Output Randomizer Mode Control Bit
Two’s Complement Mode Control Bit
LVDS Internal Termination Bit
Output Disable Bit
OUTTEST2
ILVDS1
D5
D5
Digital Output Test Pattern Bits
Digital Output Mode Control Bits
OUTTEST1
ILVDS0
D4
D4
LTC2182/LTC2181/LTC2180
OUTTEST0
TERMON
D3
D3
OUTOFF
ABP
D2
D2
OUTMODE1
RAND
D1
D1
TWOSCOMP
OUTMODE0
D0
D0
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