ltc2182 Linear Technology Corporation, ltc2182 Datasheet - Page 24

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ltc2182

Manufacturer Part Number
ltc2182
Description
16-bit, 65msps/ 40msps/25msps Low Power Dual Adcs
Manufacturer
Linear Technology Corporation
Datasheet

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APPLICATIONS INFORMATION
LTC2182/LTC2181/LTC2180
Phase Shifting the Output Clock
In Full Rate CMOS mode the data output bits normally
change at the same time as the falling edge of CLKOUT
so the rising edge of CLKOUT
output data. In Double Data Rate CMOS and LVDS modes
the data output bits normally change at the same time as
the falling and rising edges of CLKOUT
set-up and hold time when latching the data, the CLKOUT
signal may need to be phase shifted relative to the data
output bits. Most FPGAs have this feature; this is generally
the best place to adjust the timing.
The LTC2182/LTC2181/LTC2180 can also phase shift the
CLKOUT
control register A2. The output clock can be shifted by 0°,
45°, 90°, or 135°. To use the phase shifting feature the
clock duty cycle stabilizer must be turned on. Another
control register bit can invert the polarity of CLKOUT
CLKOUT
tion of these two features enables phase shifts of 45° up
to 315° (Figure 14).
24
+
/CLKOUT
, independently of the phase shift. The combina-
signals by serially programming mode
D0-D15, OF
CLKOUT
ENC
+
+
+
can be used to latch the
+
. To allow adequate
Figure 14. Phase Shifting CLKOUT
+
and
+
+
,
DATA FORMAT
Table 1 shows the relationship between the analog input
voltage, the digital data output bits and the overflow bit.
By default the output data format is offset binary. The 2’s
complement format can be selected by serially program-
ming mode control register A4.
Table 1. Output Codes vs Input Voltage
A
(2V Range)
>1.000000V
+0.999970V
+0.999939V
+0.000030V
+0.000000V
–0.000030V
–0.000061V
–0.999939V
–1.000000V
<–1.000000V
218210
IN
PHASE
SHIFT
+
135°
180°
225°
270°
315°
45°
90°
F14
– A
IN
CLKINV
0
0
0
0
1
1
1
1
OF
MODE CONTROL BITS
1
0
0
0
0
0
0
0
0
1
CLKPHASE1
(OFFSET BINARY)
1111 1111 1111 1111
1111 1111 1111 1111
1111 1111 1111 1110
1000 0000 0000 0001
1000 0000 0000 0000
0111 1111 1111 1111
0111 1111 1111 1110
0000 0000 0000 0001
0000 0000 0000 0000
0000 0000 0000 0000
D15-D0
0
0
1
1
0
0
1
1
CLKPHASE0
0
1
0
1
0
1
0
1
(2’s COMPLEMENT)
0111 1111 1111 1111
0111 1111 1111 1111
0111 1111 1111 1110
0000 0000 0000 0001
0000 0000 0000 0000
1111 1111 1111 1111
1111 1111 1111 1110
1000 0000 0000 0001
1000 0000 0000 0000
1000 0000 0000 0000
D15-D0
218210f

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