s908gr32ag3vfa Freescale Semiconductor, Inc, s908gr32ag3vfa Datasheet - Page 137

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s908gr32ag3vfa

Manufacturer Part Number
s908gr32ag3vfa
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
12.3.3 Port A Input Pullup Enable Register
The port A input pullup enable register (PTAPUE) contains a software configurable pullup device for each
of the eight port A pins. Each bit is individually configurable and requires that the data direction register,
DDRA, bit be configured as an input. Each pullup is automatically and dynamically disabled when a port
bit’s DDRA is configured for output mode.
PTAPUE7–PTAPUE0 — Port A Input Pullup Enable Bits
Freescale Semiconductor
1. X = Don’t care
2. I/O pin pulled up to V
3. Writing affects data register, but does not affect input.
4. Hi-Z = High impedance
PTAPUE
These writable bits are software programmable to enable pullup devices on an input port bit.
Bit
X
1 = Corresponding port A pin configured to have internal pullup
0 = Corresponding port A pin has internal pullup disconnected
1
0
Address:
Pullup or pulldown resistors are automatically selected for keyboard
interrupt pins depending on the bit settings in the keyboard interrupt polarity
register (INTKBIPR) see
DDRA
Reset:
Read:
Write:
Bit
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
0
0
1
Figure 12-5. Port A Input Pullup Enable Register (PTAPUE)
DD
PTAPUE7
$000D
by internal pullup device
Bit 7
0
PTA
X
Bit
X
X
(1)
PTAPUE6
6
0
Input, Hi-Z
Input, V
Table 12-2. Port A Pin Functions
I/O Pin
Output
Mode
PTAPUE5
9.7.3 Keyboard Interrupt Polarity
DD
5
0
(2)
(4)
PTAPUE4
NOTE
Accesses to DDRA
4
0
DDRA7–DDRA0
DDRA7–DDRA0
DDRA7–DDRA0
Read/Write
PTAPUE3
3
0
PTAPUE2
2
0
PTA7–PTA0
Register.
Read
PTAPUE1
Pin
Pin
1
0
Accesses to PTA
PTAPUE0
Bit 0
0
PTA7–PTA0
PTA7–PTA0
PTA7–PTA0
Write
Port A
(3)
(3)
137

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