s908gr32ag3vfa Freescale Semiconductor, Inc, s908gr32ag3vfa Datasheet - Page 234

• Manufacturer Part Number: s908gr32ag3vfa
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Timer Interface Module (TIM1)
TOF — TIM1 Overflow Flag Bit
TOIE — TIM1 Overflow Interrupt Enable Bit
TSTOP — TIM1 Stop Bit
TRST — TIM1 Reset Bit
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This read/write flag is set when the TIM1 counter reaches the modulo value programmed in the TIM1
counter modulo registers. Clear TOF by reading the TIM1 status and control register when TOF is set
and then writing a 0 to TOF. If another TIM1 overflow occurs before the clearing sequence is complete,
then writing 0 to TOF has no effect. Therefore, a TOF interrupt request cannot be lost due to
inadvertent clearing of TOF. Reset clears the TOF bit. Writing a 1 to TOF has no effect.
This read/write bit enables TIM1 overflow interrupts when the TOF bit becomes set. Reset clears the
TOIE bit.
This read/write bit stops the TIM1 counter. Counting resumes when TSTOP is cleared. Reset sets the
TSTOP bit, stopping the TIM1 counter until software clears the TSTOP bit.
Setting this write-only bit resets the TIM1 counter and the TIM1 prescaler. Setting TRST has no effect
on any other registers. Counting resumes from $0000. TRST is cleared automatically after the TIM1
counter is reset and always reads as 0. Reset clears the TRST bit.
1 = TIM1 counter has reached modulo value
0 = TIM1 counter has not reached modulo value
1 = TIM1 overflow interrupts enabled
0 = TIM1 overflow interrupts disabled
1 = TIM1 counter stopped
0 = TIM1 counter active
1 = Prescaler and TIM1 counter cleared
0 = No effect
Address: $0020
Do not set the TSTOP bit before entering wait mode if the TIM1 is required
to exit wait mode. Also, when the TSTOP bit is set and the timer is
configured for input capture operation, input captures are inhibited until the
TSTOP bit is cleared.
Setting the TSTOP and TRST bits simultaneously stops the TIM1 counter
at a value of $0000.
Reset:
Read:
Write:
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
Bit 7
TOF
Figure 17-5. TIM1 Status and Control Register (T1SC)
0
0
= Unimplemented
TOIE
6
0
TSTOP
5
1
NOTE
NOTE
TRST
4
0
0
3
0
0
PS2
2
0
PS1
1
0
Freescale Semiconductor
Bit 0
PS0
0