bbt3821 Intersil Corporation, bbt3821 Datasheet - Page 29

• Manufacturer Part Number: bbt3821
• Description: Octal Multi-rate Lx4/cx4 - Xaui Re-timer
• Manufacturer: Intersil Corporation

Note (1): This bit is latched high on any change in the condition detected. It is reset low (cleared) on being read.
Note (1): These bits control (select) alarm signals (bits) in register 1.41072 (1.A070’h) to generate the TX_Flag bit of register 1.36868 (1.9004’h) to trigger TX_ALARM
Note (2): The default values may be overwritten by the Auto-Configure operation (See “Auto-Configuring Control Registers” on page 16 and Table 92 for details).
Note (1): These bits control (select) alarm signals (bits) in register 1.41073 (1.A071’h) to generate the RX_Flag bit of register 1.36867 (1.9003’h) to trigger RX_ALARM
Note (2): The default value may be overwritten by the Auto-Configure operation (See “Auto-Configuring Control Registers” on page 16 and Table 92 for details).
1.36869.15:4
1.36869.3
1.36869.2
1.36869.1
1.36869.0
1.36870.15:8
1.36870.7
1.36870.6
1.36870.5:4
1.36870.3
1.36870.2
1.36870.1
1.36870.0
1.36871.15:8
1.36871.7
1.36871.6
1.36871.5:0
BIT
BIT
and hence LASI.
and hence LASI.
BIT
(1)
(1)
Reserved
TTmp_Hi
TTmp_Lo
Reserved
LBC_Hi
LBC_Lo
LOP_Hi
LOP_Lo
Reserved
ROP_Hi
ROP_Lo
Reserved
Reserved
GPIO Alarm
RX_ALARM
TX_ALARM
LS_ALARM
NAME
NAME
NAME
29
1 = Enable Alarm
0 = Disable Alarm
1 = Enable Alarm
0 = Disable Alarm
1 = Enable Alarm
0 = Disable Alarm
1 = Alarm Condition is
Detected
0 = No Alarm Condition is
Detected
Table 31. XENPAK DOM RX_FLAG CONTROL REGISTER
Table 30. XENPAK DOM TX_FLAG CONTROL REGISTER
SETTING
SETTING
MDIO REGISTER, ADDRESS = 1.36869 (1.9005’h)
MDIO REGISTER, ADDRESS = 1.36870 (1.9006’h)
MDIO REGISTER, ADDRESS = 1.36871 (1.9007’h)
Table 29. XENPAK LASI STATUS REGISTER
SETTING
0’h
0’b
00’h
000’h
0’b
0’b
0’b
0’b
0’b
000’h
0’b
0’b
DEFAULT
DEFAULT
BBT3821
000’h
0’b
0’b
0’b
0’b
DEFAULT
(2)
(2)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
LH
R/W
(1)
Transceiver Temp High Alarm Enable
Transceiver Temp Low Alarm Enable
Laser Bias Current High AlarmEnable
Laser Bias Current Low Alarm Enable
Laser Output Power High Alarm Enable
Laser Output Power Low Alarm Enable
Receive Optical Power High Alarm
Enable
Receive Optical Power Low Alarm
Enable
Logic OR of signals in register
1.49169.[15:8] (1.C011h), which come
from GPIO pins.
Logic OR of signals in register
1.36867 RX_ALARM Status register
Logic OR of signals in register
1.36868 TX_ALARM Status register
Link Status Logic change in AND of “PMD Signal
OK” (1.10.0), “PCS Lane
Alignment” (3.24.12), and “PHY XS
Lane Alignment” (4.24.12)
DESCRIPTION
DESCRIPTION
DESCRIPTION