bbt3821 Intersil Corporation, bbt3821 Datasheet - Page 36

• Manufacturer Part Number: bbt3821
• Description: Octal Multi-rate Lx4/cx4 - Xaui Re-timer
• Manufacturer: Intersil Corporation

Note (1): The value may be overwritten by the Auto-Configure operation (See “Auto-Configuring Control Registers” on page 16 and Table 92 for details).
Note (1): If any of these bits is set to ‘1’, it triggers LASI if the corresponding bit in 1.49170.5:0 and the GPIO enable bit 1.36866.3 are set high.
Note (1): If any of these bits is set to ‘1’, it triggers LASI if the corresponding bit in 1.49169.12:8 and the GPIO enable bit 1.36866.3 are set high. The polarity that will
Note (2): These values may be overwritten by the Auto-Configure operation (See “Auto-Configuring Control Registers” on page 16 and Table 92 for details).
Note (1): The value may be overwritten by the Auto-Configure operation (See “Auto-Configuring Control Registers” on page 16 and Table 92 for details).
1.49168.15:5
1.49168.4:0
1.49169.15:13
1.49169.12:8
1.49169.7:5
1.49169.4:0
1.49170.15:14
1.49170.13
1.49170.12:8
1.49170.7:5
1.49170.4:0
1.49171.15:5
1.49171.4:0
trigger LASI is set by bits 1.49170.12:8 above.
BIT
BIT
BIT
BIT
Reserved
GPIO pins
configuration
Reserved
LASI I/P
value
Reserved
GPIO Pin I/P
Value
Reserved
Invert TX_FAULT 1 = Pin Low,
Invert LASI I/P
Reserved
Enable LASI I/P
Reserved
GPIO Pin
Output
NAME
NAME
NAME
NAME
36
Table 49. TX_FAULT & GPIO PIN TO LASI CONFIGURE REGISTER
Table 47. GPIO PIN DIRECTION CONFIGURE REGISTER
0 = Pin High to trigger LASI
1 = Invert to LASI
0 = Straight to LASI
1 = Enable
0 = Do not Enable
MDIO REGISTER ADDRESS = 1.49168 (1.C010’h)
MDIO REGISTER ADDRESS = 1.49169 (1.C011’h)
MDIO REGISTER ADDRESS = 1.49170 (1.C012’h)
MDIO REGISTER ADDRESS = 1.49171 (1.C013’h)
1 = output
0 = input
1 = can trigger LASI
0 = cannot trigger LASI
1 = Pin Hi
0 = Pin Lo
0 = Low
1 = High
Table 48. GPIO PIN INPUT STATUS REGISTER
Table 50. GPIO PIN OUTPUT REGISTER
SETTING
SETTING
SETTING
(1)
SETTING
BBT3821
(1)
00’h
00’h
DEFAULT
DEFAULT
0’b
00’h
00’h
(1)
(1)
DEFAULT
(2)
(2)
(2)
RO/LH
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
XOR of GPIO Pin I/P and Invert register
1.49170.13:8.
Original values from GPIO pins directly.
Controls whether GPIO pin is used as input or
output
Controls GPIO pin level if set as output
Control Polarity of TX_FAULT pin which will
trigger LASI (if enabled)
register 1.49169.13:8.
Enable the GPIO pin value to trigger
GPIO_ALARM to LASI
Control XOR of GPIO Pin I/P to LASI I/P
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION