lm12l458civf National Semiconductor Corporation, lm12l458civf Datasheet - Page 27

• Manufacturer Part Number: lm12l458civf
• Description: 12-bit Sign Data Acquisition System With Self-calibration
• Manufacturer: National Semiconductor Corporation

6.0 Analog Considerations
6.1 REFERENCE VOLTAGE
The difference in the voltages applied to the V
V
between the voltages applied between two multiplexer inputs
or the voltage applied to one of the multiplexer inputs and
analog ground), over which 4095 positive and 4096 negative
codes exist. The voltage sources driving V
must have very low output impedance and noise.
The ADC can be used in either ratiometric or absolute refer-
ence applications. In ratiometric systems, the analog input
voltage is proportional to the voltage used for the ADC’s
reference voltage. When this voltage is the system power
supply, the V
connected to GND. This technique relaxes the system refer-
ence stability requirements because the analog input voltage
and the ADC reference voltage move together. This main-
tains the same output code for given input conditions.
For absolute accuracy, where the analog input voltage varies
between very specific voltage limits, a time and temperature
stable voltage source can be connected to the reference
inputs. Typically, the reference voltage’s magnitude will re-
quire an initial adjustment to null reference voltage induced
full-scale errors.
6.2 INPUT RANGE
The LM12L458’s fully differential ADC and reference voltage
inputs generate a two’s-complement output that is found by
using the equation below.
Round up to the next integer value between −4096 to 4095
for 12-bit resolution and between −256 to 255 for 8-bit reso-
lution if the result of the above equation is not a whole
number. As an example, V
1.5V and V
positive full-scale, or 0,1111,1111,1111. If V
V
output code is 0,1100,0000,0000.
6.3 INPUT CURRENT
A charging current flows into or out of (depending on the
input voltage polarity) the analog input pins, IN0–IN7 at the
start of the analog input acquisition time (t
rent’s peak value will depend on the actual input voltage
applied. This charging current causes voltage spikes at the
inputs. This voltage spikes will not corrupt the conversion
results.
6.4 INPUT SOURCE RESISTANCE
For low impedance voltage sources (
tion) the input charging current will decay, before the end of
the S/H’s acquisition time, to a value that will not introduce
any conversion errors. For higher source impedances, the
S/H’s acquisition time can be increased. As an example,
operating with a 6 MHz clock frequency and maximum ac-
REF−
REF−
defines the analog input voltage span (the difference
= 1V, V
IN−
REF+
IN+
= GND. The 12-bit + sign output code is
= 3V, and V
pin is connected to V
REF+
IN−
= 2.5V, V
= GND, the 12-bit + sign
<
80Ω for 6 MHz opera-
REF−
A
+ and V
ACQ
REF+
REF+
= 1V, V
). This cur-
REF+
or V
= 3.3V,
REF−
IN+
REF−
and
is
=
27
quisition time, the LM12L458’s analog inputs can handle
source impedance as high as 5.56 kΩ. Refer to Section 2.1,
Instruction RAM “00”, Bits 12–15 for further information.
6.5 INPUT BYPASS CAPACITANCE
External capacitors (0.01 µF to 0.1 µF) can be connected
between the analog input pins, IN0–IN7, and analog ground
to filter any noise caused by inductive pickup associated with
long input leads. It will not degrade the conversion accuracy.
6.6 NOISE
The leads to each of the analog multiplexer input pins should
be kept as short as possible. This will minimize input noise
and clock frequency coupling that can cause conversion
errors. Input filtering can be used to reduce the effects of the
noise sources.
6.7 POWER SUPPLIES
Noise spikes on the V
conversion errors; the comparator will respond to the noise.
The ADC is especially sensitive to any power supply spikes
that occur during the auto-zero or linearity correction. Low
inductance tantalum capacitors of 10 µF or greater paral-
leled with 0.1 µF monolithic ceramic capacitors are recom-
mended for supply bypassing. Separate bypass capacitors
should be used for the V
close as possible to these pins.
6.8 GROUNDING
The LM12L458’s nominal performance can be maximized
through proper grounding techniques. These include the use
of a single ground plane and meticulously separating analog
and digital areas of the board. The use of separate analog
and digital digital planes within the same board area gener-
ally provides best performance. All components that handle
digital signals should be placed within the digital area of the
board, as defined by the digital power plane, while all analog
components should be placed in the analog area of the
board. Such placement and the routing of analog and digital
signal lines within their own respective board areas greatly
reduces the occurrence of ground loops and noise. This will
also minimize EMI/RFI radiation and susceptibility.
It is recommended that stray capacitance between the ana-
log inputs (IN0–IN7, V
creasing the clearance (+1/16th inch) between the analog
signal and reference pins and the ground plane.
6.9 CLOCK SIGNAL CONSIDERATIONS
The LM12L458’s performance is optimized by routing the
analog input/output and reference signal conductors (pins
34–44) as far as possible from the conductor that carries the
clock signal to pin 23.
Avoid overshoot and undershoot on the clock line by treating
this line as a transmission line (use proper termination tech-
niques). Failure to do so can result in erratic operation.
Generally, a series 30Ω to 50Ω resistor in the clock line,
located as close to the clock source as possible, will prevent
most problems. The clock source should drive ONLY the
LM12L458 clock pin.
7.0 Common Application Problems
Driving the analog inputs with op-amp(s) powered from
supplies other than the supply used for the LM12L458.
This practice allows for the possibility of the amplifier output
(LM12L458 input) to reach potentials outside of the 0V to
A
REF+
+ and V
A
+ and V
, and V
D
D
+ supply lines can cause
+ supplies and placed as
REF−
) be reduced by in-
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