dac1008 National Semiconductor Corporation, dac1008 Datasheet - Page 17

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dac1008

Manufacturer Part Number
dac1008
Description
Up Compatible, Double-buffered D To A Converters
Manufacturer
National Semiconductor Corporation
Datasheet

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Figure 18 illustrates the simplicity of interfacing the
7 0 MICROPROCESSOR INTERFACE
The logic functions of the DAC1006 family have been ori-
ented towards an ease of interface with all popular mPs The
following sections discuss in detail a few useful interface
schemes
7 1 DAC1001 1 2 to INS8080A Interface
DAC1006 to an INS8080A based microprocessor system
FIGURE 18 Interfacing the DAC1000 to the INS8080A CPU Group
NOTE DOUBLE BYTE STORES CAN BE USED
e g THE INSTRUCTION SHLD F001 STORES THE L
REG INTO B1 AND THE H REG INTO B2 AND
TRANSFERS THE RESULT TO THE DAC REGISTER
THE OPERAND OF THE SHLD INSTRUCTION MUST
BE AN ODD ADDRESS FOR PROPER TRANSFER
17
The circuit will perform an automatic transfer of the 10 bits
of output data from the CPU to the DAC register as outlined
in Section 6 2 1 ‘‘Controlling Data Transfer for an 8-Bit Data
Bus ’’
Since a double byte write is necessary to control the DAC
with the INS8080A a possible instruction to achieve this is a
PUSH of a register pair onto a ‘‘stack’’ in memory The 16-
bit register pair word will contain the 10 bits of the eventual
DAC input data in the proper sequence to conform to both
TL H 5688 – 24

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