dac1008 National Semiconductor Corporation, dac1008 Datasheet - Page 19

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dac1008

Manufacturer Part Number
dac1008
Description
Up Compatible, Double-buffered D To A Converters
Manufacturer
National Semiconductor Corporation
Datasheet

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7 4 Digitally Controlled Amplifier Attenuator
An unusual application of the DAC Figure 21 applies the
input voltage via the on-chip feedback resistor The lower
op amp automatically adjusts the V
I
of this V
in the DAC register I
magnitude of V
converts I
V
OUT1
OUT
e
is equal to the input current (V
V
REF IN
IN
OUT2

1023
voltage depends on the digital word which is
IN
to a voltage V
N
and the digital word The second op amp
b
FIGURE 20 Isolating Data Bus from DAC Circuitry to Eliminate Digital Noise Coupling
N
J
OUT2
where 0
then depends upon both the
OUT
k
N
REF IN
FIGURE 21 Digitally Controlled Amplifier Attenuator
which is given by
IN
s
1023
Rf
B
voltage such that
) The magnitude
19
NOTE DATA HOLD TIME REDUCED TO THAT OF DM74LS374 (
Note that N
or this will cause the output amplifier to saturate at either
To provide a digitally controlled divider the output op amp
can be eliminated Ground the I
V
the V
given by
V
g
OUT
OUT
V
MAX
REF
eb
is now taken from the lower op amp (which also drives
depending on the sign of V
input of the DAC) The expression for V
V
M
IN
e
0 (or a digital code of all zeros) is not allowed
fractional binary number)
0
where M
k
M
k
1
e
Digital input (expressed as a
OUT2
IN
pin of the DAC and
TL H 5688 – 26
OUT
is now
10 ns)

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