dac1008 National Semiconductor Corporation, dac1008 Datasheet - Page 7

• Manufacturer Part Number: dac1008
• Description: Up Compatible, Double-buffered D To A Converters
• Manufacturer: National Semiconductor Corporation

Settling Time Settling time is the time required from a code
transition until the DAC output reaches within
the final output value Full-scale settling time requires a zero
to full-scale or full-scale to zero output change
Full-Scale Error Full scale error is a measure of the output
error between an ideal DAC and the actual device output
Ideally for the DAC1006 series full-scale is V
For V
LE
able to zero
Monotonicity If the output of a DAC increases for increas-
ing digital input code then the DAC is monotonic A 10-bit
DAC with 10-bit monotonicity will produce an increasing an-
alog output when all 10 digital inputs are exercised A 10-bit
DAC with 9-bit monotonicity will be monotonic when only
the most significant 9 bits are exercised Similarly 8-bit
monotonicity is guaranteed when only the most significant 8
bits are exercised
2 0 DOUBLE BUFFERING
These DACs are double-buffered microprocessor compati-
ble versions of the DAC1020 10-bit multiplying DAC The
addition of the buffers for the digital input data not only al-
lows for storage of this data but also provides a way to
assemble the 10-bit input data word from two write cycles
when using an 8-bit data bus Thus the next data update for
the DAC output can be made with the complete new set of
10-bit data Further the double buffering allows many DACs
in a system to store current data and also the next data The
updating of the new data for each DAC is also not time
critical When all DACs are updated a common strobe sig-
nal can then be used to cause all DACs to switch to their
new analog output levels
e
10 0000V
REF
eb
b
10V and unipolar operation
9 8mV
e
9 9902V Full-scale error is adjust-
FIGURE 1 Basic Logic Threshold Loop
REF
g
V
FULL-SCA-
b
LSB of
1 LSB
7
3 0 TTL COMPATIBLE LOGIC INPUTS
To guarantee TTL voltage compatibility of the logic inputs a
novel bipolar (NPN) regulator circuit is used This makes the
input logic thresholds equal to the forward drop of two di-
odes (and also matches the temperature variation) as oc-
curs naturally in TTL The basic circuit is shown in Figure 1
A curve of digital input threshold as a function of power
supply voltage is shown in the Typical Performance Charac-
teristics section
4 0 APPLICATION HINTS
The DC stability of the V
factor to maintain accuracy of the DAC over time and tem-
perature changes A good single point ground for the analog
signals is next in importance
These MICRO-DAC converters are CMOS products and
reasonable care should be exercised in handling them prior
to final mounting on a PC board The digital inputs are pro-
tected but permanent damage may occur if the part is sub-
jected to high electrostatic fields Store unused parts in con-
ductive foam or anti-static rails
4 1 Power Supply Sequencing
Some IC amplifiers draw excessive current from the Analog
inputs to V
vent damage to the DAC
nected from I
prevent destructive currents in I
or LF356 is used
The standard power supply decoupling capacitors which are
used for the op amp are adequate for the DAC
b
when the supplies are first turned on To pre-
OUT1
or I
these diodes are not required
OUT2
REF
an external Schottky diode con-
to ground may be required to
source is the most important
TL H 5688 – 9
OUT1
Decoupling
or I
OUT2
If an LM741