epm2210gm100i Altera Corporation, epm2210gm100i Datasheet - Page 14

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epm2210gm100i

Manufacturer Part Number
epm2210gm100i
Description
Section I. Max Ii Device Family Data Sheet
Manufacturer
Altera Corporation
Datasheet
Logic Array Blocks
Figure 2–4. DirectLink Connection
2–6Core Version a.b.c variable
MAX II Device Handbook, Volume 1
DirectLink interconnect from
left LAB or IOE output
interconnect
DirectLink
to left
Interconnect
LAB Interconnects
The LAB local interconnect can drive LEs within the same LAB. The LAB
local interconnect is driven by column and row interconnects and LE
outputs within the same LAB. Neighboring LABs, from the left and right,
can also drive an LAB’s local interconnect through the DirectLink
connection. The DirectLink connection feature minimizes the use of row
and column interconnects, providing higher performance and flexibility.
Each LE can drive 30 other LEs through fast local and DirectLink
interconnects.
LAB Control Signals
Each LAB contains dedicated logic for driving control signals to its LEs.
The control signals include two clocks, two clock enables, two
asynchronous clears, a synchronous clear, an asynchronous preset/load,
a synchronous load, and add/subtract control signals, providing a
maximum of 10 control signals at a time. Although synchronous load and
clear signals are generally used when implementing counters, they can
also be used with other functions.
Local
Logic Element
Figure 2–4
shows the DirectLink connection.
LE0
LE1
LE2
LE3
LE4
LE5
LE6
LE7
LE8
LE9
LAB
DirectLink
interconnect
to right
DirectLink interconnect from
right LAB or IOE output
Altera Corporation
March 2008

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