epm2210gm100i Altera Corporation, epm2210gm100i Datasheet - Page 94
epm2210gm100i
Manufacturer Part Number
epm2210gm100i
Description
Section I. Max Ii Device Family Data Sheet
Manufacturer
Altera Corporation
Datasheet
1.EPM2210GM100I.pdf
(108 pages)
- Current page: 94 of 108
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Timing Model and Specifications
5–24Core Version a.b.c variable
MAX II Device Handbook, Volume 1
Note to
(1)
Symbol Parameter
t
t
t
t
t
f
H
CO
CH
CL
CNT
CNT
Table 5–24. EPM570 Global Clock External I/O Timing Parameters
The maximum frequency is limited by the I/O standard on the clock input pin. The 16-bit counter critical delay
performs faster than this global clock input pin maximum frequency.
Table 5–24
Global
clock hold
time
Global
clock to
output
delay
Global
clock high
time
Global
clock low
time
Minimum
global clock
period for
16-bit
counter
Maximum
global clock
frequency
for 16-bit
counter
:
Cond-
10 pF
ition
—
—
—
—
—
Min
166
166
0.0
2.0
3.3
—
–3 Speed
Grade
304.0
Max
4.5
(1)
—
—
—
—
Min
216
216
0.0
2.0
4.0
—
–4 Speed
Grade
247.5
Max
5.8
—
—
—
—
Min
266
266
0.0
2.0
5.0
–5 Speed
—
Grade
201.1
Max
7.1
—
—
—
—
(Part 2 of 2)
Min
253
253
2.0
5.4
—
–6 Speed
0
Grade
184.1
Max
6.1
—
—
—
—
Altera Corporation
Min
335
335
2.0
8.1
–7 Speed
—
0
Grade
123.5 MHz
Max
7.6
—
—
—
—
July 2008
Unit
ns
ns
ps
ps
ns
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