saf7118 NXP Semiconductors, saf7118 Datasheet - Page 74

• Manufacturer Part Number: saf7118
• Description: Multistandard Video Decoder With Adaptive Comb Filter And Component Video Input
• Manufacturer: NXP Semiconductors

Philips Semiconductors
SAF7118_3
Product data sheet
9.5.1 X port configured as output
Table 28:
[1]
If data output is enabled at the expansion port, then the data stream from the decoder is
presented. The data format of the 8-bit data bus is dependent on the chosen data type,
selectable by the line control registers LCR2 to LCR24; see
image port, the sliced data format is not available on the expansion port. Instead, raw
CVBS samples are always transferred if any sliced data type is selected.
Some details of data types on the expansion port are as follows:
Symbol Pin
XPD7 to
XPD0
XCLK
XDQ
XRDY
XRH
XRV
XTRI
•
•
Pin numbers for QFP160 in parenthesis.
Active video (data type 15): contains component Y-C
pixels per line. The amplitude and offsets are programmable via DBRI7 to DBRI0,
DCON7 to DCON0, DSAT7 to DSAT0, OFFU1, OFFU0, OFFV1 and OFFV0. The
nominal levels are illustrated in
Test line (data type 6): is similar to the active video format, with some constraints
within the data processing:
– Adaptive chrominance comb filter, vertical filter (chrominance comb filter for NTSC
standards, PAL phase error correction) within the chrominance processing are
disabled
C11, A11,
B10, A10, B9,
A9, B8 and A8
(127, 128,
130, 131, 134,
135, 138 and
139)
A7 (143)
B7 (144)
A6 (146)
C7 (141)
D8 (140)
B11 (126)
Signals dedicated to the expansion port
[1]
Rev. 03 — 16 February 2006
I/O
I/O
I/O
I/O
O
I/O
I/O
I
Description
X port data: in output mode controlled by
decoder section, data format see
in input mode Y-C
data or luminance part of a 16-bit
Y-C
clock at expansion port: if output, then
copy of LLC; as input normally a double
pixel clock of up to 32 MHz or a gated
clock (clock gated with a qualifier)
data valid flag of the expansion port input
(qualifier): if output, then decoder
(HREF and VGATE) gate; see
data request flag = ready to receive, to
work with optional buffer in external
device, to prevent internal buffer overflow;
second function: input related task flag
A/B
horizontal reference signal for the X port:
as output: HREF or HS from the decoder
(see
for horizontal input timing and a polarity for
input field ID detection can be defined
vertical reference signal for the X port: as
output: V123 or field ID from the decoder
(see
reference edge for vertical input timing and
for input field ID detection can be defined
port control: switches X port input 3-state
Multistandard video decoder with adaptive comb filter
B
-C
Figure
Figure 30
Figure
R
4 : 2 : 2 input
32); as input: a reference edge
19.
and
B
-C
Figure
R
4 : 2 : 2 serial input
31); as input: a
Figure 32
B
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
-C
Table
Table
R
4 : 2 : 2 signal, 720 active
29;
7. In contrast to the
Bit
OFTS[2:0] 13h[2:0],
91h[7:0] and
C1h[7:0]
XCKS[92h[0]]
-
XRQT[83h[2]]
XRHS[13h[6]],
XFDH[92h[6]] and
XDH[92h[2]]
XRVS[1:0] 13h[5:4],
XFDV[92h[7]] and
XDV[1:0] 92h[5:4]
XPE[1:0] 83h[1:0]
SAF7118
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