saa7105h-v1 NXP Semiconductors, saa7105h-v1 Datasheet - Page 20

• Manufacturer Part Number: saa7105h-v1
• Description: Digital Video Encoder
• Manufacturer: NXP Semiconductors

Philips Semiconductors
7.20.4
The input vertical offset can be taken from the assumption
that the scaler should just have finished writing the first line
when the encoder starts reading it:
In most cases the vertical offsets will be the same for odd
and even fields. The results should be rounded down.
YPIX = InLin
YSKIP defines the anti-flicker function. 0 means maximum
flicker reduction but minimum vertical bandwidth, 4095
gives no flicker reduction and maximum bandwidth. Note
that the maximum value for YINC is 4095. It might be
necessary to reduce the value of YSKIP to fulfil this
requirement.
When YINC = 0 it sets the scaler to scaling factor 1. The
initial weighting factors must not be set to 0 in this case.
YIWGTE may go negative. In this event, YINC should be
added and YOFSE incremented. This can be repeated as
often as necessary to make YIWGTE positive.
It should be noted that these equations assume that the
input is non-interlaced but the output is interlaced. If the
input is interlaced, the initial weighting factors need to be
adapted to obtain the proper phase offsets in the output
frame.
If vertical upscaling beyond the upper capabilities is
required, the parameter YUPSC may be set to logic 1. This
extends the maximum vertical scaling factor by a factor
of 2. Only the parameter YINC is affected, it needs to be
divided by two to get the same effect.
There are restrictions in this mode:
2004 Mar 04
YOFS
YOFS
YINC
YIWGTO
YIWGTE
The vertical filter YFILT is not available in this mode; the
circuit will ignore this value
The horizontal blanking needs to be long enough to
transfer an output line between 2 memory locations.
This is 710 internal pixel clocks.
Digital video encoder
=
=
=
V
--------------------- -
InLin
FAL 1716 TXclk
--------------------------------------------------- - 2.5
FAL 1728 TXclk
--------------------------------------------------- - 2.5
OutLin
=
ERTICAL SCALER
=
YINC YSKIP
------------------------------------- -
YINC
------------- -
InPpl TPclk
InPpl TPclk
+
2
2
–
+
2
2048
1
+
YSKIP
---------------- -
4095
–
–
4096
(60 Hz)
(50 Hz)
20
7.21
The SAA7104H; SAA7105H accepts digital Y, C
RGB data with levels (digital codes) in accordance with
“ITU-R BT.601” . An optional gain adjustment also allows
to accept data with the full level swing of 0 to 255.
For C and CVBS outputs, deviating amplitudes of the
colour difference signals can be compensated for by
independent gain control setting, while gain for luminance
is set to predefined values, distinguishable for 7.5 IRE
set-up or without set-up.
The RGB, respectively C
individual gain setting for luminance (GY) and colour
difference signals (GCD). Reference levels are measured
with a colour bar, 100% white, 100% amplitude and
100% saturation.
The SAA7104H; SAA7105H has special input cells for the
VGC port. They operate at a wider supply voltage range
and have a strict input threshold at
speed of these cells, the EIDIV bit needs to be set to
logic 1. Note that the impedance of these cells is
approximately 6 k . This may cause trouble with the
bootstrapping pins of some graphic chips. So the
power-on reset forces the bit to logic 0, the input
impedance is regular in this mode.
Table 6 “ITU-R BT.601” signal component levels
Note
1. Transformation:
White
Yellow
Cyan
Green
Magenta
Red
Blue
Black
Or the upscaling factor needs to be limited to 1.5 and the
horizontal upscaling factor is also limited to less than
COLOUR
1.5. In this case a normal blanking length is sufficient.
a) R = Y + 1.3707
b) G = Y
c) B = Y + 1.7324
Input levels and formats
0.3365
235
210
170
145
106
81
41
16
Y
SAA7104H; SAA7105H
128
166
202
240
128
C
16
54
90
R
(C
(C
(C
B
-Y-C
B
B
R
SIGNALS
128
146
222
240
110
128
B
128)
128).
C
128)
16
34
path features an
R
1
/
2
V
Product specification
235
235
235
235
0.6982
DDD
16
16
16
16
R
(1)
. To achieve full
235
235
235
235
16
16
16
16
G
(C
B
, C
R
R
235
235
235
235
16
16
16
16
B
128)
or