admc331 Analog Devices, Inc., admc331 Datasheet - Page 25

• Manufacturer Part Number: admc331
• Description: Single Chip Dsp Motor Controller
• Manufacturer: Analog Devices, Inc.

Address
0x3FFF
0x3FFE
0x3FFD
0x3FFC
0x3FFB
0x3FFA
0x3FF9
0x3FF8
0x3FF7
0x3FF6
0x3FF5
0x3FF4
0x3FF3
0x3FF2
0x3FF1
0x3FF0
0x3FEF
Name
SYSCNTL
MEMWAIT
TPERIOD
TCOUNT
TSCALE
SPORT0_RX_WORDS1
SPORT0_RX_WORDS0
SPORT0_TX_WORDS1
SPORT0_TX_WORDS0
SPORT0_CTRL_REG
SPORT0_SCLKDIV
SPORT0_RFSDIV
SPORT0_AUTOBUF_CTRL
SPORT1_CTRL_REG
SPORT1_SCLKDIV
SPORT1_RFSDIV
SPORT1_AUTOBUF_CTRL
Table XI. DSP Core Registers
Bits
[15 . . . 0]
[15 . . . 0]
[15 . . . 0]
[15 . . . 0]
[7 . . . 0]
[15 . . . 0]
[15 . . . 0]
[15 . . . 0]
[15 . . . 0]
[15 . . . 0]
[15 . . . 0]
[15 . . . 0]
[15 . . . 0]
[15 . . . 0]
[15 . . . 0]
[15 . . . 0]
[15 . . . 0]
Function
System Control Register
Memory Wait State Control Register
Interval Timer Period Register
Interval Timer Count Register
Interval Timer Scale Register
SPORT0 Multichannel Word 1 Receive
SPORT0 Multichannel Word 0 Receive
SPORT0 Multichannel Word 1 Transmit
SPORT0 Multichannel Word 0 Transmit
SPORT0 Control Register
SPORT0 Clock Divide Register
SPORT0 Receive Frame Sync Divide
SPORT0 Autobuffer Control Register
SPORT1 Control Register
SPORT1 Clock Divide Register
SPORT1 Receive Frame Sync Divide
SPORT1 Autobuffer Control Register
ADMC331