admc331 Analog Devices, Inc., admc331 Datasheet - Page 26

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admc331

Manufacturer Part Number
admc331
Description
Single Chip Dsp Motor Controller
Manufacturer
Analog Devices, Inc.
Datasheet

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ADMC331
System Controller Registers
The system controller includes three registers, MODECTRL,
SYSSTAT and IRQFLAG registers. The format of these regis-
ters is shown at the end of the data sheet.
The MODECTRL register controls different multiplexing,
PWM interrupt and operating modes:
• Bit 0 and 1 control the multiplexing of the ADC auxiliary
• Bit 2 enables/disables the PWMTRIP interrupt: if the bit is
• Bit 3 enables/disables the PWMSYNC interrupt: if the bit is
• Bit 4 controls the multiplexing of the SPORT1 pins: if the bit
• Bit 5 controls the configuration of SPORT1 as a UART inter-
• Bit 6 selected the PWM operating mode: single or double
• Bit 7 selects the ADC counter frequency: if the bit is set full
• Bit 8 selects the Auxiliary PWM operating mode: offset or
The SYSSTAT register displays various status information:
• Bit 0 indicates the status of the PWMTRIP pin: if this bit is
• Bit 1 indicates the status of the watchdog flag register: this bit
• Bit 2 indicates the status of the PWMPOL pin: if this bit is
• Bit 3 indicates the status of the PWM timer.
• Bit 4 indicates the status of the PWMSR pin: if this bit is set
The IRQFLAG register indicates the occurrence of PWM
interrupts:
• Bit 0 indicates that a PWMTRIP interrupt, either hardware of
• Bit 1 indicates that a PWMSYNC interrupt has occurred.
channels.
set the interrupt is enabled.
set the interrupt is enabled.
is set DR1B is selected.
face: if the bit is set UART mode is enabled.
duty cycle update modes. If the bit is set double update mode
is selected.
DSP clkout frequency is selected.
independent modes: if the bit is set independent mode is
selected.
high, then PWMTRIP pin is high and no PWMTRIP is oc-
curring, if this bit is low, then the PWM is currently shut
down.
is set following a watchdog timeout.
set, the PWMPOL pin is high and active high PWM outputs
will be produced.
to a logic one, the PWMSR pin is low and switched reluc-
tance mode is enabled.
software, has occurred.
Register Memory Map
The address, name, used bits and function of all motor control
peripheral registers of the ADMC331 are tabulated in Table X.
In addition, the relevant DSP core registers are tabulated in
Table XI. Full details of the DSP core registers can be obtained
by referring to the ADSP-2171 sections of the ADSP-2100 Family
User’s Manual, Third Edition.
Development Kit
To facilitate device evaluation and programming, an evaluation
kit (ADMC331-EVAL KIT) is available from Analog Devices.
The evaluation kit consists of an evaluation board and the
Motion Control Debugger software. The evaluation kit con-
tains latest programming and device information. It is recom-
mended that the evaluation kit be used for initial program
development.

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