xc3s1400an Xilinx Corp., xc3s1400an Datasheet - Page 104

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xc3s1400an

Manufacturer Part Number
xc3s1400an
Description
Spartan-3an Fpga Family Data Sheet
Manufacturer
Xilinx Corp.
Datasheet

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Pinout Descriptions
User I/Os by Bank
Table 75
distributed between the four I/O banks on the FGG676
package. The AWAKE pin is counted as a Dual-Purpose
I/O.
Table 75: User I/Os Per Bank for the XC3S1400AN in the FGG676 Package
Footprint Migration Differences
The XC3S1400AN is the only Spartan-3AN FPGA offered in
the FGG676 package.
The XC3S1400AN FPGA is pin compatible with the
Spartan-3A XC3S1400A FPGA in the FG(G)676 package,
although the Spartan-3A FPGA requires an external
configuration source.
104
Top
Right
Bottom
Left
Package
TOTAL
Edge
indicates how the 502 available user-I/O pins are
I/O Bank
0
1
2
3
Maximum I/O
120
130
120
132
502
313
I/O
82
67
67
97
www.xilinx.com
INPUT
20
15
14
18
67
All Possible I/O Pins by Type
DUAL
30
21
52
1
0
DS557-4 (v3.1) June 2, 2008
VREF
10
10
38
9
9
Product Specification
CLK
32
8
8
8
8
R

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