xc3s1400an Xilinx Corp., xc3s1400an Datasheet - Page 5

• Manufacturer Part Number: xc3s1400an
• Description: Spartan-3an Fpga Family Data Sheet
• Manufacturer: Xilinx Corp.

Configuration
Spartan-3AN FPGAs are programmed by loading
configuration data into robust, reprogrammable, static
CMOS configuration latches (CCLs) that collectively control
all functional elements and routing resources. The FPGA’s
configuration data is stored on-chip in nonvolatile Flash
memory, or externally in a PROM or some other nonvolatile
medium, either on or off the board. After applying power, the
configuration data is written to the FPGA using any of seven
different modes:
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The MultiBoot feature stores multiple configuration files in
the on-chip Flash, providing extended life with field
upgrades. MultiBoot also supports multiple system
solutions with a single board to minimize inventory and
simplify the addition of new features, even in the field.
Flexibility is maintained to do additional MultiBoot
configurations via the external configuration method.
The Spartan-3AN device authentication protocol prevents
cloning. Design cloning, unauthorized overbuilding, and
complete reverse engineering have driven device security
requirements to higher and higher levels. Authentication
moves the security from bitstream protection to the next
generation of design-level security protecting both the
design and embedded microcode. The authentication
algorithm is entirely user defined, implemented using FPGA
logic. Every product, generation, or design can have a
different algorithm and functionality to enhance security.
DS557-1 (v3.1) June 2, 2008
Product Specification
Configure from internal SPI Flash memory
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♦
♦
Master Serial from a Xilinx Platform Flash PROM
Serial Peripheral Interface (SPI) from an external
industry-standard SPI serial Flash
Byte Peripheral Interface (BPI) Up from an
industry-standard x8 or x8/x16 parallel NOR Flash
Slave Serial, typically downloaded from a processor
Slave Parallel, typically downloaded from a processor
Boundary-Scan (JTAG), typically downloaded from a
processor or system tester
Completely self-contained
Reduced board space
Easy-to-use configuration interface
R
Figure 2: Spartan-3AN FPGA Configuration Interface from Internal SPI Flash Memory
Configure
from internal
Flash memory
‘0’
‘1’
‘1’
(Figure
Spartan-3AN FPGA
M2
M1
M0
www.xilinx.com
2)
VCCAUX
In-System Flash Memory
Each Spartan-3AN FPGA contains abundant integrated SPI
serial Flash memory, shown in
store the FPGA’s configuration bitstream. However, the
Flash memory array is large enough to store at least two
MultiBoot FPGA configuration bitstreams or nonvolatile
data required by the FPGA application, such as
code-shadowed MicroBlaze processor applications.
Table 2: Spartan-3AN Device In-system Flash Memory
After configuration, the FPGA design has full access to the
in-system Flash memory via an internal SPI interface; the
control logic is implemented with FPGA logic. Additionally,
the FPGA application itself can store nonvolatile data or
provide live, in-system Flash updates.
The Spartan-3AN device in-system Flash memory supports
leading-edge serial Flash features.
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1.
XC3S50AN
XC3S200AN
XC3S400AN
XC3S700AN
XC3S1400AN
INIT_B
DONE
Number
Small page size (264 or 528 bytes) simplifies
nonvolatile data storage
Randomly accessible, byte addressable
Up to 66 MHz serial data transfers
SRAM page buffers
♦
♦
♦
Page, Block, and Sector Erase
Aligned to next available page location.
Part
Read Flash data while programming another Flash
page
EEPROM-like byte write functionality
Two buffers in most devices, one in XC3S50AN
Total Flash
17,301,504
1,081,344
3.3V
Indicates when
configuration is
finished
4,325,376
4,325,376
8,650,752
Memory
Introduction and Ordering Information
(bits)
DS557-1_06_013107
Table
Bitstream
1,196,128
1,886,560
2,732,640
4,755,296
437,312
FPGA
(bits)
2, used primarily to
12,545,280
Additional
3,127,872
2,437,248
5,917,824
642,048
Memory
(bits)
Flash
(1)
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