xc3s1400an Xilinx Corp., xc3s1400an Datasheet - Page 53

• Manufacturer Part Number: xc3s1400an
• Description: Spartan-3an Fpga Family Data Sheet
• Manufacturer: Xilinx Corp.

Table 45: SPI_ACCESS Interface Timing (Continued)
In-System Flash (ISF) Memory Timing
Table 46: In-System Flash (ISF) Memory Operations
DS557-3 (v3.1) June 2, 2008
Product Specification
Notes:
1.
2.
Notes:
1.
Symbol
T
T
T
(T
T
SPICKO_MISO
COMP
T
T
T
T
XFER
The SPI_ACCESS interface timing is supported in simulation in ISE 10.1 software.
For details on using SPI_ACCESS and the In-System Flash memory, see
The SPI_ACCESS interface timing is supported in simulation in ISE 10.1 software.
F
F
T
T
PEP
Symbol
F
PP
PE
BE
SE
MISOCKO
SPICAR1
SPICAR1
SPICLKH
SPICLKL
SPICLK
R
Page to Buffer transfer time
Page to Buffer compare time
Page Programming time
Page Erase time
Page Erase and Programming time
Block Erase time
Sector Erase time
)
Clock-to-output delay on MISO after active edge of CLK
CLK frequency
CLK frequency for Continuous Array Read command
CLK frequency for Continuous Array Read command,
reduced initial latency
CLK High time
CLK Low time
Description
Description
www.xilinx.com
UG333
Spartan-3AN FPGA In-System Flash User Guide.
Min
6.8
–
–
–
–
–
XC3S50AN
XC3S200AN
XC3S400AN
XC3S700AN
XC3S1400AN
XC3S50AN
XC3S200AN
XC3S400AN
XC3S700AN
XC3S1400AN
XC3S50AN
XC3S200AN
XC3S400AN
XC3S700AN
XC3S1400AN
XC3S50AN
XC3S200AN
XC3S400AN
XC3S700AN
XC3S1400AN
XC3S50AN
XC3S200AN
XC3S400AN
XC3S700AN
XC3S1400AN
-5
Device
All
All
DC and Switching Characteristics
Max
14.3
Speed Grade
50
50
33
∞
∞
Typical
Min
6.8
0.8
1.6
–
–
–
–
–
13
15
14
17
15
30
45
–
–
2
3
-4
Max
16.0
Max
400
400
100
50
50
33
2.5
∞
∞
32
35
35
40
35
75
4
6
5
Units
Units
MHz
MHz
MHz
ms
ms
ms
ms
ms
ms
ms
ms
ms
ns
ns
ns
μ
μ
s
s
s
s
53