xc4000h Xilinx Corp., xc4000h Datasheet - Page 27

• Manufacturer Part Number: xc4000h
• Description: Logic Cell Array Families
• Manufacturer: Xilinx Corp.

externally, the device determines its configuration mode
by capturing its status inputs, and is ready to start the
configuration process. A master device waits an additional
Notes: 1. At power-up, V
Master Serial Mode Programming Switching Characteristics
CCLK
Serial Data In
Serial DOUT
2. Configuration can be controlled by holding INIT Low with or until after the INIT of all daisy-chain slave mode devices
3. Master-serial-mode timing is based on testing in slave mode.
(Output)
(Output)
PROGRAM Low until V
is High.
CCLK
n – 3
CC
must rise from 2.0 V to Vcc min in less than 25 ms, otherwise delay configuration by pulling
Description
Data In setup
Data In hold
1
CC
T
is valid.
DSCK
n
n – 2
2 T
1
2
2-33
CKDS
Symbol
n + 1
up to 250 s to make sure that all slaves in the potential
daisy-chain have seen INIT being High.
T
T
DSCK
CKDS
n – 1
Min
20
0
n + 2
Max
n
Units
ns
ns
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